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SIMIA32: make port_lock/port_unlock nesting-aware #66

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SIMIA32: make port_lock/port_unlock nesting-aware #66

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14 changes: 10 additions & 4 deletions os/common/ports/SIMIA32/chcore.h
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Original file line number Diff line number Diff line change
Expand Up @@ -385,10 +385,16 @@ static inline bool port_is_isr_context(void) {
/**
* @brief Kernel-lock action.
* @details In this port this function disables interrupts globally.
* @note Uses a nesting counter so that an S-class chSysUnlock() from
* ISR context (e.g. CriticalSectionLocker inside a timer callback)
* does not accidentally drop a lock held by chSysLockFromISR().
* On real ARM hardware both S-class and I-class locks manipulate
* BASEPRI identically, so nesting works implicitly; the simulator
* must emulate that behavior explicitly.
*/
static inline void port_lock(void) {

port_irq_sts = (syssts_t)1;
port_irq_sts++;
}

/**
Expand All @@ -397,7 +403,7 @@ static inline void port_lock(void) {
*/
static inline void port_unlock(void) {

port_irq_sts = (syssts_t)0;
port_irq_sts--;
}

/**
Expand All @@ -407,7 +413,7 @@ static inline void port_unlock(void) {
*/
static inline void port_lock_from_isr(void) {

port_irq_sts = (syssts_t)1;
port_irq_sts++;
}

/**
Expand All @@ -417,7 +423,7 @@ static inline void port_lock_from_isr(void) {
*/
static inline void port_unlock_from_isr(void) {

port_irq_sts = (syssts_t)0;
port_irq_sts--;
}

/**
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