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SIMIA32: make port_lock/port_unlock nesting-aware#66

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SIMIA32: make port_lock/port_unlock nesting-aware#66
FDSoftware wants to merge 1 commit into
rusefi:stable_21.11.x.rusefi_clean_historyfrom
FDSoftware:bugfix/SIMAI32_isr_lock

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The SIMIA32 simulator port used a simple boolean flag (0/1) for port_lock()/port_unlock(). When ChibiOS timer callbacks call code that uses S-class chSysLock/chSysUnlock (e.g. CriticalSectionLocker inside efiPrintfInternal), chSysUnlock() would reset the flag to 0 even though chSysLockFromISR() had set it to 1 — effectively dropping the ISR lock and corrupting the cooperative scheduler's ready list and delta list.

On real ARM hardware this never happens because both S-class and I-class locks manipulate BASEPRI identically, so nesting is implicit.

Switch to a counter (++/--) so nested lock/unlock pairs balance correctly, matching the ARM port's behavior.

The SIMIA32 simulator port used a simple boolean flag (0/1) for
port_lock()/port_unlock().  When ChibiOS timer callbacks call code
that uses S-class chSysLock/chSysUnlock (e.g. CriticalSectionLocker
inside efiPrintfInternal), chSysUnlock() would reset the flag to 0
even though chSysLockFromISR() had set it to 1 — effectively dropping
the ISR lock and corrupting the cooperative scheduler's ready list and
delta list.

On real ARM hardware this never happens because both S-class and
I-class locks manipulate BASEPRI identically, so nesting is implicit.

Switch to a counter (++/--) so nested lock/unlock pairs balance
correctly, matching the ARM port's behavior.
@FDSoftware FDSoftware marked this pull request as draft April 13, 2026 18:51
@rusefillc rusefillc requested a review from dron0gus April 13, 2026 19:24
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