增加 A210 芯片支持 #329
Conversation
|
开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28926267994 参数解析结果
测试完成 详细结果:
Kunit Test Result[07:50:03] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
|
|
开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28998159202 参数解析结果
测试完成 详细结果:
Kunit Test Result[06:21:36] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
|
| return false; | ||
|
|
||
| if (arch_id != 0 || impid != 0) | ||
| if (!check_xuantie_family(arch_id, impid)) |
There was a problem hiding this comment.
Should Zicbom be used instead of Xthead CMO?
|
|
||
| zhihe,ccu-mode: | ||
| $ref: /schemas/types.yaml#/definitions/uint32 | ||
| description: CCU operating mode (0 = gating, 1 = scaling). |
There was a problem hiding this comment.
This sounds weird, and is this really needed? (This property isn't shown in the example below)
|
|
||
| examples: | ||
| - | | ||
| ccu@0 { |
There was a problem hiding this comment.
Unit address should match reg base address.
| const: zhihe,a210-aon | ||
|
|
||
| reg: | ||
| minItems: 1 |
There was a problem hiding this comment.
Can some memory addresses be omitted while the AON subsystem still work? If not so, minItems should be also 3.
| maxItems: 3 | ||
|
|
||
| reg-names: | ||
| minItems: 1 |
| items: | ||
| - const: aon0 | ||
|
|
||
| version: |
There was a problem hiding this comment.
Should this use a vendor-specific name instead? e.g. "zhihe,protocol-version" .
|
|
||
| version: | ||
| $ref: /schemas/types.yaml#/definitions/uint32 | ||
| description: Mailbox hardware version (1 = V1, 2 = V2). |
There was a problem hiding this comment.
Hardware version information should be part of the compatible string.
| - items: | ||
| - const: zhihe,a210-dwmac | ||
| - const: snps,dwmac-5.20 | ||
| - const: zhihe,a210-dwmac |
There was a problem hiding this comment.
Why is there two options with one omitting generic dwmac compatible and one not?
| an SoC-specific glue layer. The node also carries the standard | ||
| snps,dwmac properties documented in net/snps,dwmac.yaml. | ||
|
|
||
| select: |
There was a problem hiding this comment.
This snippet looks weird although this exists in th1520 binding too.
Maybe adding some comment like display/msm/gpu.yaml is good?
In that file:
# dtschema does not select nodes based on pattern+const, so add custom select
# as a work-around:
There was a problem hiding this comment.
Oh sorry this comment does not apply here.
| items: | ||
| - const: pclk | ||
|
|
||
| zhihe,group-id: |
There was a problem hiding this comment.
Why is this group index necessary? Having such index is usually weird.
|
|
||
| required: | ||
| - "#power-domain-cells" | ||
| - id |
There was a problem hiding this comment.
Maybe it's better to make this reg instead of id ?
In such case the subnode name should also be changed to something like power-domain@xxx.
There was a problem hiding this comment.
Maybe it's better to make this
reginstead ofid? In such case the subnode name should also be changed to something likepower-domain@xxx.
同意，请在 Documentation/devicetree/bindings/power/ 下搜索 ”power-domain“ 及其用法的例子。
| regulators { | ||
| compatible = "zhihe,a210-aon-regulator"; | ||
|
|
||
| dvdd_core { |
There was a problem hiding this comment.
Usually node name shouldn't contain _ .
| physically controlled by the Always-On (AON) subsystem firmware and | ||
| are accessed from the application processor over the AON mailbox. | ||
| Each supported rail is described by a child node whose regulator-name | ||
| identifies the corresponding AON virtual regulator. |
There was a problem hiding this comment.
I think regulator-name property usually means the regulator name registered to the operating system, should it be decoupled from the firmware regulator name? (In this case, the firmware regulator name will have another property like zhihe,regulator-id ).
| reset-controller { | ||
| compatible = "zhihe,a210-reset-controller"; | ||
| reg = <0x06b20400 0x200>; | ||
| reg-names = "VP_RST"; |
There was a problem hiding this comment.
I think multiple reset controllers should have different compatible strings instead of different reg-names, see upstream reset/thead,th1520-reset.yaml as an example.
|
|
||
| properties: | ||
| compatible: | ||
| const: zhihe,a210-reset-sample |
There was a problem hiding this comment.
As it's already in a SoC, is it still a "sample"?
Maybe it's better to name it zhihe,a210-cpu-reset .
| - | | ||
| reset-sample { | ||
| compatible = "zhihe,a210-reset-sample"; | ||
| reg = <0x00 0x00>; |
There was a problem hiding this comment.
This reg value looks very weird, maybe it's better to specify the registers via reg/reg-names instead of custom properties.
There was a problem hiding this comment.
这里沿用了 th1520 的做法，在 opensbi 中共用相同的代码
| oneOf: | ||
| - description: Boards based on the Zhihe A210 SoC | ||
| items: | ||
| - const: zhihe,a210 |
There was a problem hiding this comment.
Individual board names should be also added here.
|
|
||
| zhihe,bm-name: | ||
| $ref: /schemas/types.yaml#/definitions/string | ||
| description: Name of this BMU instance. |
There was a problem hiding this comment.
Ah, why is there both different compatible and these properties? Aren't these properties detectable by compatible?
| minItems: 1 | ||
| maxItems: 4 | ||
| description: | ||
| Per-channel BMU interrupts, two per monitored register group. |
There was a problem hiding this comment.
Maybe it will be good to constrain the interrupt count based on the compatible string.
|
|
||
| properties: | ||
| compatible: | ||
| const: zhihe,a210-iopmp |
There was a problem hiding this comment.
BTW in my memory TH1520 IOPMP isn't controlled by rich OS, is this changed in A210?
In addition, how would IOPMP device nodes be referenced by the corresponding bus master device nodes?
| $id: http://devicetree.org/schemas/clock/zhihe,a210-clk.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Zhihe A210 Clock Controller |
There was a problem hiding this comment.
BTW what's the difference between this and the "CCU"?
|
The pinctrl driver looks similar to the TH1520 one, maybe some code deduplication should be done? |
|
|
||
| menu "ZHIHE SoC drivers" | ||
|
|
||
| config A210_MEMTESTER |
There was a problem hiding this comment.
These two options should be part of the corresponding commits instead of this one.
| struct zhihe_aon_msg_regulator_ctrl { | ||
| struct aon_rpc_msg_hdr hdr; | ||
| union rpc_func_t { | ||
| struct rpc_msg_regu_vol_set regu_vol_set; |
There was a problem hiding this comment.
The alignment is weird here.
|
|
||
| static struct regulator_desc zhihe_a210_aon_regu_desc[] = { | ||
| /*common regu , no need to adjust vol dynamicaly */ | ||
| REGU_DSC_DEF(A210_AVDD33_EMMC, "avdd33_emmc"), |
There was a problem hiding this comment.
Should the map of numeric regulator IDs to names be part of the device tree instead of the driver?
| #include <linux/device.h> | ||
| #include <linux/types.h> | ||
|
|
||
| #define AON_RPC_MSG_MAGIC (0xef) |
There was a problem hiding this comment.
Isn't this source file a duplication of https://github.com/RVCK-Project/rvck/blob/rvck-6.6/include/linux/firmware/thead/thead%2Cth1520-aon.h ?
There was a problem hiding this comment.
对于完全新的产品支持，一个 PR 包含太多的模块会导致 review 不方便。所以请将这个 PR 按照模块/子系统 拆分后分成多个 PR 提交。这也是上游 review 时 maintainer 的基本要求。从现在做起来对以后正式向上游提交也是有帮助的（btw， A210 现在还没有去往上游正式提交，是吗？）
建议的提交顺序可以是先从基础的设备树开始（cpu 基本信息+最简单的 soc，一般先只有串口，使得系统可以启动进入控制台并打印输出即可），然后逐步添加功能模组。
模组的划分一般按照 clock，reset，pinctrl ... 的顺序，可以参考目前上游化做的比较好的产品的补丁提交流程，譬如 https://github.com/spacemit-com/linux/wiki 或者 https://github.com/sophgo/linux/wiki。
几个提交补丁中的通用规则：
- binding/dts 信息同样按照模组拆分，而不是整体性提交。每个模组 PR 时一般都会包括各自对应的 binding/driver/dts 三件套
- dts 提交时需要自行提前运行 dtbcheck 确保没有告警和错误
- 代码提交时需要自行提前运行 checkpatch 确保没有告警和错误，有时允许一些小的告警，但不能有错误。
- 所有涉及项目列表时都要按照英文字母的字典顺序排列，譬如
arch/riscv/Kconfig.socs中添加ARCH_ZHIHE时应该排在ARCH_VIRT后面，诸如此类 ......
感谢您的支持！
See https://docs.github.com/en/issues/tracking-your-work-with-issues/using-issues/linking-a-pull-request-to-an-issue 另外结合我前面提的拆分 PR 的操作，我建议拆分 PR 后，您也能够相应地创建对应的 sub-issue，并将 #313 作为一个 主 issue。 
|
先以这个pr作为第一版的审阅吧，按照达成共识的审阅意见修改，修改后的补丁和没问题补丁按照其内在的逻辑关系拆分出来，单独提交pr。即改一部分、拆一部分、提交一部分、合并一部分，这样合并也快一些，好吗？ |
提供的信息太少了，这里应该作为所有补丁的摘要，能够让开发者一眼看懂你的代码都做了什么事情，而不是去一遍一遍地过补丁来推测做了什么。 |
|
|
||
| zhihe,ccu-mode: | ||
| $ref: /schemas/types.yaml#/definitions/uint32 | ||
| description: CCU operating mode (0 = gating, 1 = scaling). |
|
|
||
| examples: | ||
| - | | ||
| ccu@0 { |
There was a problem hiding this comment.
作为一个时钟控制器，其节点名称必须是 ”clock-controller“，"ccu" 更适合作为一个 tag。
建议对 dts 文件都运行一下 dtbcheck
There was a problem hiding this comment.
看上去这东西并不作为 Linux CLK framework 的时钟输出？
感觉这个更像一个 SoC 特定的特殊配置，只是它恰好叫 CCU （
There was a problem hiding this comment.
虽然我还是觉得如果可以的话也许给它起一个没那么容易混淆的名字比较合适
| $id: http://devicetree.org/schemas/clock/zhihe,a210-clk.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Zhihe A210 Clock Controller |
There was a problem hiding this comment.
同问，ccu 和这些 xxx-clk 地位有何区别，是否都可以合并到一个 ccu 的 binding 中去。
There was a problem hiding this comment.
不一样的， ccu 是硬件自己完成调频的，没有 ccu 也可以工作，没有 clk 就不能工作了。
There was a problem hiding this comment.
所以 ccu 的功能到底是什么，对硬件调频的部分时钟行为进行微调？
There was a problem hiding this comment.
对的，是硬件内部会根据负载自动升频或降频，只需要 enable + 阈值
There was a problem hiding this comment.
那我觉得第一阶段可以先去掉，不得不调的时候再拿出来？
| $id: http://devicetree.org/schemas/reset/zhihe,a210-reset-sample.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Zhihe A210 CPU Reset (reset-sample) |
There was a problem hiding this comment.
这里叫 ”sample“ 是什么意思？是不是可以换个说法？sample 给人感觉是个 ”例子“ ？
|
|
||
| required: | ||
| - "#power-domain-cells" | ||
| - id |
There was a problem hiding this comment.
Maybe it's better to make this
reginstead ofid? In such case the subnode name should also be changed to something likepower-domain@xxx.
同意，请在 Documentation/devicetree/bindings/power/ 下搜索 ”power-domain“ 及其用法的例子。
| interrupts: | ||
| maxItems: 1 | ||
|
|
||
| icu_cpu_id: |
| help | ||
| This enables support for SiFive SoC platform hardware. | ||
|
|
||
| config ARCH_ZHIHE |
There was a problem hiding this comment.
所有涉及项目列表时都要按照英文字母的字典顺序排列，ARCH_ZHIHE 应该排在 ARCH_VIRT 后面
There was a problem hiding this comment.
rvck 使用统一的 defconfig，而不是一个产品一个 config。
|
开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/29390531061 参数解析结果
测试完成 详细结果:
Kunit Test Result[05:09:17] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
|
Add devicetree binding schema documentation for the ZhiHe A210 SoC, covering clock, reset, pinctrl, power domain, mailbox, AON firmware, regulator, IOPMP, DWMAC, BMU and memtester. Also register the "zhihe" vendor prefix and add A210 compatibles to the existing dw-axi-dmac and dwcmshc-sdhci bindings. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Introduce the ARCH_ZHIHE platform Kconfig symbol to enable support for ZhiHe SoCs. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add dt-bindings header files for the ZhiHe A210 SoC: - clock/a210-clock.h: clock IDs - reset/a210-reset.h: reset IDs - power/a210-power.h: power domain IDs - iopmp/a210-iopmp.h: IOPMP IDs These headers are referenced by both device tree sources and drivers. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a clock controller driver for the ZhiHe A210 SoC that manages: - PLLs (integer and fractional) - Clock gates, dividers, and muxes for peripheral clocks The driver registers with the common clock framework and is referenced by device tree nodes through the clock binding IDs defined in dt-bindings/clock/a210-clock.h. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a reset controller driver for the ZhiHe A210 SoC that manages hardware reset lines for various on-chip IP blocks. The driver uses reset line IDs defined in dt-bindings/reset/a210-reset.h. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a pin controller driver for the ZhiHe A210 SoC supporting pin multiplexing and pin configuration (pull-up/down, drive strength, etc.). Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a generic power domain driver for the ZhiHe A210 SoC to manage power gating of on-chip IP blocks. The driver uses power domain IDs defined in dt-bindings/power/a210-power.h. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a mailbox controller driver for the ZhiHe A210 SoC used for inter-processor communication between the application processor and the Always-On (AON) E902 core. The driver implements the standard mailbox controller API and supports interrupt-driven message passing. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add the Always-On (AON) subsystem driver for the ZhiHe A210 SoC. This driver manages IPC communication with the E902 AON core and provides: - Mailbox-based IPC message transport - Power, clock, and resource management requests to the AON firmware - Proc debug interface for runtime diagnostics Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a virtual regulator driver for the ZhiHe A210 SoC that controls voltage regulators through the AON subsystem IPC interface. The driver translates standard regulator framework calls into IPC messages to the AON firmware which performs the actual hardware control. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add "zhihe,a210-axi-dma" compatible string to the dw-axi-dmac driver with HAS_RESETS and USE_CFG2 chip flags matching the A210 DMA controller configuration. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add "zhihe,a210-dwcmshc" compatible string to the sdhci-of-dwcmshc driver for the ZhiHe A210 SDHCI controller. The A210 SDHCI IP behaves identically to the TH1520 one, so the existing TH1520 platform data and callbacks are reused directly. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add a platform glue driver for the Synopsys DWMAC Ethernet controller integrated in ZhiHe SoCs. The driver handles SoC-specific clock and reset management and configures the MAC interface mode through a syscon register. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
When a UART port is deferred-probed (e.g. due to pinctrl dependencies), the re-registration path calls dw8250_set_termios() via register_console() -> console_call_setup() -> uart_set_options(). The original code unconditionally calls clk_disable_unprepare() which drops the enable count to zero, causing the clock framework to gate the UART hardware clock. Since the bootconsole (earlycon) is still actively writing to the same port, the MMIO access to the clock-gated peripheral causes a bus-level hang. Fix this by removing the disable/enable pair and only calling clk_set_rate() when the rate actually needs to change. For fixed-rate clock sources the rate never differs so clk_set_rate() is never called. Fixes: 4e26b13 ("serial: 8250_dw: clock rate handling for all ACPI platforms") Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add the IO Physical Memory Protection (IOPMP) driver for the ZhiHe A210 SoC. The IOPMP controls peripheral DMA memory access permissions. The driver issues SBI extension calls (SBI_EXT_CONFIG_IOPMP) to configure protection rules from S-mode. Define the corresponding SBI extension ID and function IDs in asm/sbi.h. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Add device tree files for the ZhiHe A210 SoC:
- a210-soc-core.dtsi: CPU cluster, interrupt controller, memory,
clocks, resets, and core bus infrastructure
- a210-soc-peri.dtsi: peripheral devices (UART, SPI, I2C, etc.)
- a210-evb.dts: A210 EVB (Evaluation Board) configuration
- a210-dev.dts: A210 development board configuration
The device tree describes the Always-On (AON) subsystem, power domains,
pin controller, and all on-chip peripherals.
Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
Enable ARCH_ZHIHE in the generic RISC-V defconfig so the ZhiHe A210 platform can be built by default. A210 provides ten DesignWare 8250 UART controllers, so raise both the build-time and runtime 8250 UART limits to cover all of them. Signed-off-by: Zhiguo Zhu <zhiguo.zhu@linux.alibaba.com>
|
开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/29391037683 参数解析结果
测试完成 详细结果:
Kunit Test Result[05:21:09] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
|
|
开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/29391037987 参数解析结果
测试完成 详细结果:
Kunit Test Result[05:21:40] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
|
|
@ifnfn 第一轮 review 就先到这里吧，请根据 #329 (review) 的要求将这个 PR 拆分成多个 PR 我们再继续 review ，如何？ 注意根据我们的要求，一个 PR 需要对应一个 issue，所以拆分后，请为每个 PR 先创建对应的 issue。具体建议可以参考 #329 (comment) 可以先把 issue 提出来，我们就基本上了解你的 拆分思路了。请确保拆分后的 PR 都是可以编译过的。 PR 拆分后请关闭本 PR。 谢谢 |
4 participants
fixed #313
This pull request adds initial support for the ZhiHe A210 SoC platform.
The series includes:
Changes since previous version