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Roadmap

André Borchert edited this page Aug 2, 2026 · 7 revisions

Roadmap

Purpose

This page gives a concise project roadmap.

Current Status

XAIOS has a bootable QEMU prototype and deterministic OS/runtime fixtures. Its portable model-v2 and inference-engine boundaries are foundational interfaces; real-model tokenizer, logits and decode parity remain incomplete.

The detailed milestone checklist lives in Project Tracker. Current execution status lives in the XAIOS GitHub Project.

Authoritative delivery order:

  1. Finish the XAIOS platform milestone. It is the only active workstream.
  2. Implement and validate Qwen 3.6 27B. It is next but blocked on XAIOS.
  3. Keep Kimi K3, DeepSeek V4 Flash 0731, and GLM 5.2 queued unless explicitly reprioritized. DeepSeek is also blocked on authoritative source identity.

Platform-specific Apple, Intel, Xeon, and ARM work is part of the XAIOS completion gate when required by its correctness and hardware-readiness criteria; it is not a competing model workstream.

Model Architecture Targets

Model Status Next gate
Qwen 3.6 27B Interface only; next but blocked Start after XAIOS, then complete tokenizer, logits, deterministic decode and physical-hardware parity.
Kimi K3 Interface/roadmap only; backlog Queued after Qwen; complete text correctness, then separate multimodal parity.
DeepSeek V4 Flash 0731 Roadmap only Verify and pin the exact official release and architecture sources.
GLM 5.2 Roadmap only Pin official sources and define a separate validated adapter.

See Model Support Roadmap. These labels record planned work and do not mean that model inference is currently available.

Phases

Phase Focus Deliverables
0 Foundation repo layout, build scripts, QEMU scripts, tests
1 Bootable server core UEFI boot, serial logging, kernel entry, PMM, VMM
2 Device and user base interrupts, timers, user init, VirtIO block/network
3 AI Cell runtime core leases, arenas, manifests, telemetry
4 Low-latency networking per-core TCP/UDP, queue ownership, latency counters
5 CPU AI runtime shared weights, private KV/cache, tokenizer boundary
6 Intel Desktop P-core/E-core policy, NVMe, PCIe NIC, benchmarks
7 Intel Xeon NUMA, server NICs, many AI Cells, admission control
8 ARM/NVIDIA AArch64, GIC, SMMU, cluster policy
9 Developer preview sample app agent, benchmark scripts, release notes

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