memory: A4000 motherboard expansion space + CPU-slot accelerator RAM#244
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Two new reaches of the big-box memory map: - The Ramsey motherboard bank can now grow past its four banks' 16M into the $04000000-$06FFFFFF motherboard RAM expansion space, in whole 4M banks up to 64M (which reaches $04000000). A4000/Ramsey-07 only; the control register keeps describing the fully populated 1Mx4 geometry, since it has no way to say more and on real hardware the expansion decode would not go through Ramsey's geometry either. - [memory] accelerator / --accelerator fits CPU-slot (accelerator board) fast RAM: a new Memory::accel_ram bank starting at $08000000 and growing upward through the coprocessor-slot space, up to 128M (ending at $10000000, where Zorro III space begins). Gated only on a 32-bit CPU -- this is the RAM a CPU board carries, so no machine profile is required, and any whole number of megabytes fits. Kickstart sizes both with its own probe: verified against the real KS 3.1 A4000 ROM, which lists 64M motherboard as $04000020-$08000000 and a 64M accelerator bank as $08000020-$0C000000 (attrs $0505), and sizes odd totals (20M/24M) exactly. tests/mb_ram.rs pins both as asset-gated integration tests. The new bank decodes through PlainMemRegion in all CPU, debugger, CCP, and GDB access paths at uncontended external speed, cacheable by both CPU caches like expansion RAM. The launcher Memory tab gains an Accelerator RAM row (greyed "needs 32-bit CPU") and A4000-only 32M/64M motherboard presets. MachineDescriptor carries the new size for the savestate shape guard, and STATE_VERSION moves to 36. Docs: configuration.md, internals/peripherals.md, copperline.example.toml, --help.
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Pull request overview
This PR extends Copperline’s big-box memory map by (1) allowing the A4000 motherboard RAM bank to grow downward through the $04000000-$06FFFFFF expansion window (up to 64 MiB) and (2) adding a new CPU-slot “accelerator” fast RAM bank at $08000000 growing upward (up to 128 MiB). It wires the new bank through CPU decode, debugger/control-protocol memory access, launcher/config surfaces, savestate shape/versioning, and documentation, with new unit + asset-gated integration tests covering the expected Kickstart probe behavior.
Changes:
- Expand A4000 motherboard RAM sizing beyond Ramsey’s 16 MiB limit into the reserved expansion window (up to 64 MiB, gated on Ramsey-07).
- Add CPU-slot accelerator RAM (
[memory] accelerator/--accelerator) at $08000000 (up to 128 MiB, gated on 32-bit CPUs) across CPU access, debugger helpers, and UI. - Update savestate version/descriptor + tests and refresh docs/example config/help to describe the new/expanded banks.
Reviewed changes
Copilot reviewed 25 out of 25 changed files in this pull request and generated 1 comment.
Show a summary per file
| File | Description |
|---|---|
| tests/mb_ram.rs | Adds ROM-asset-gated integration tests that assert Kickstart sizes the expanded motherboard window and CPU-slot RAM. |
| src/zorro_device.rs | Updates test Memory construction to include the new accel_ram field. |
| src/z3660.rs | Updates multiple test Memory constructions to include accel_ram. |
| src/wasmboard.rs | Updates test Memory construction to include accel_ram. |
| src/video/window/tests.rs | Updates app test machine Memory construction to include accel_ram. |
| src/video/launcher.rs | Adds launcher field/row/presets for accelerator RAM; adds A4000-only motherboard expansion presets and CPU gating/drop behavior. |
| src/savestate.rs | Bumps STATE_VERSION to 36 and updates tests/descriptors to include accelerator RAM sizing. |
| src/ramsey.rs | Documents/locks Ramsey control-register geometry behavior for >16 MiB motherboard totals and tests it. |
| src/memory.rs | Raises motherboard cap to 64 MiB, introduces accel_ram + fitting/reset logic and bounds constants/tests. |
| src/main.rs | Adds --accelerator CLI parsing plus help text, and updates placeholder Memory initialization. |
| src/gdbstub.rs | Updates test Memory construction to include accel_ram. |
| src/filesys.rs | Updates test Memory construction to include accel_ram. |
| src/emulator.rs | Fits/logs accelerator RAM during machine build and updates test Memory constructions. |
| src/cpu.rs | Adds PlainMemRegion::AccelRam decode + caching/debugger write support and a CPU-level test for 32-bit vs 24-bit reach. |
| src/control.rs | Updates test emulator Memory construction to include accel_ram. |
| src/config.rs | Adds config surface/override/raw field for [memory] accelerator, validation, descriptor plumbing, and tests; expands motherboard validation to A4000 expansion window. |
| src/cdtv.rs | Updates test Memory construction to include accel_ram. |
| src/bus/tests.rs | Updates bus test Memory construction to include accel_ram. |
| src/bus.rs | Extends writable_ram_regions and peek_word_any to include accelerator RAM. |
| src/a4091.rs | Updates test Memory construction to include accel_ram. |
| src/a2091.rs | Updates test Memory construction to include accel_ram. |
| src/a2065.rs | Updates test Memory construction to include accel_ram. |
| docs/internals/peripherals.md | Documents the A4000 motherboard expansion window behavior and the new accelerator RAM bank. |
| docs/guide/configuration.md | Documents new [memory] accelerator / --accelerator and A4000 motherboard expansion sizing. |
| copperline.example.toml | Adds commented example/config notes for accelerator RAM and updated motherboard expansion behavior. |
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Review feedback on PR #244: the function gained the CPU-slot bank but its doc comment still named only chip/slow/motherboard/Zorro RAM.
Summary
Two new reaches of the big-box memory map, building on the Ramsey motherboard RAM from #242:
[memory] motherboardbank still ends at $08000000 and grows downward, but on the A4000 (gated on Ramsey-07) it can now grow past Ramsey's four-bank 16M into the expansion window: whole 4M banks up to 64M, which reaches exactly $04000000. The A3000 stays capped at Ramsey's own 16M, and the control register keeps describing the fully populated 1Mx4 geometry -- it has no way to say more, and on real hardware the expansion decode would not go through Ramsey's geometry either.[memory] accelerator/--acceleratorbank,Memory::accel_ram, starting at $08000000 and growing upward through the coprocessor-slot space, up to 128M (ending at $10000000, where Zorro III space begins; Z3 boards configure at $40000000, so no overlap). This is the RAM an accelerator/CPU board carries, so it is gated only on a 32-bit CPU -- an accelerated A1200 config takes it too -- and any whole number of megabytes fits.Surfaces: the new bank decodes through
PlainMemRegionin every CPU access path at uncontended external speed, cacheable by both CPU caches like expansion RAM;peek_word_any/writable_ram_regionsreach it for the debugger, CCP, and GDB stub. The launcher Memory tab gains an Accelerator RAM row (greyed "needs 32-bit CPU") and A4000-only 32M/64M motherboard presets, with both banks dropped on a CPU downgrade to a 24-bit part so the emitted config still validates.MachineDescriptorcarries the new size for the savestate shape guard andSTATE_VERSIONmoves to 36. Docs: configuration.md, internals/peripherals.md, copperline.example.toml,--help.Verification
Booted the real Kickstart 3.1 A4000 ROM and walked exec's memory list (asset-gated tests + a live control-protocol session):
--motherboard 64M: MemHeader$04000020-$08000000, attrs $0505 (PUBLIC|FAST|LOCAL|KICK) -- Kickstart's top-down probe walks the whole expansion window.--accelerator 64M: MemHeader$08000020-$0C000000; exec relocates ExecBase into the CPU-slot bank when it is the best memory.--motherboard 20M --accelerator 24Mlists$06C00020-$08000000and$08000020-$09800000.tests/mb_ram.rsgrows two more asset-gated#[ignore]integration tests pinning the 64M motherboard and CPU-slot probes (~1.7s total in release; skip cleanly without the ROM). New unit tests cover the expansion-window bounds and $04000000 base math, the accelerator bank fit/reset/refusal, config validation for both banks (A4000-only gate, 4M steps, megabyte granularity, 24-bit CPU rejection), the launcher gates and presets, and a CPU-level test showing a 68030 store lands at $08000000 while a 68000's 24-bit bus wraps past it.cargo test(1716 unit tests + suites),cargo clippy --all-targets, andcargo fmt --checkare all clean.