hal: dts: mspm0: restructure pinctrl dtsi to reference existing node - #91
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cc @ssekar15 |
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ping for review @glneo |
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Silly question, but does anyone know why these DTS files are here in the HAL in the first place? They are not part of TI's Driverlib HAL, these are for Zephyr consumption only. Why not move these over into the Zephyr repo so if we need to make changes like this we don't need to worry about cross-repo synchronization. |
It's the case for almost all vendors (couldn't find the reference in doc). Pinctrl files are mostly auto-generated from data in HAL repos, rarely change afterwards, and they are huge, so it's logical to keep them in HAL repo. |
I see only NXP, Microchip, and ST doing that. Many more vendor/platforms seem to have these in the main repo with the rest of their DT files. The files are huge, but I don't see why that means they should be hidden away in a HAL layer. |
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ping for review @ssekar15 |
glneo
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Would still like to see these moved out of the HAL and into the main repo someday, but for now this change looks good to me.
Remove the pin-controller node redefinition from per-family pinctrl dtsi files. The node is now defined in the Zephyr SoC dtsi at the correct IOMUX base address (0x40428000). Update include path to use the Zephyr-tree header location. Pin configuration node definitions are unchanged. Board files that include these dtsi files continue to work via the &pinctrl label reference. Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
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hal_ti PR zephyrproject-rtos#91 (zephyrproject-rtos/hal_ti#91) restructures the MSPM0 pinctrl dtsi files to reference the existing node via `&pinctrl` instead of redefining pin-controller@400a0000. Without it the Zephyr mspm0.dtsi change (pin-controller moved to 0x40428000) causes a duplicate-label DTS error on any MSPM0 board build. Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
The MSPM0 per-family pinctrl dtsi files (MSPM0G and MSPM0L series) redefined the pin-controller DT node and set its address to 0x400a0000 (GPIOA peripheral base). This address is incorrect — the actual IOMUX hardware base on all MSPM0 variants is 0x40428000
Remove the pin-controller node redefinition from per-family pinctrl dtsi files. The node is now defined in the Zephyr SoC dtsi at the correct IOMUX base address (0x40428000). Update include path to use the Zephyr-tree header location.
Pin configuration node definitions are unchanged. Board files that include these dtsi files continue to work via the &pinctrl label reference.