[XPU] Prefer MXFP8 MoE XPU backend; forward softcap/ALIBI

[krisclarkdev]

Purpose

Wire vLLM call sites so Intel XPU picks the native MXFP8 MoE path and so softcap/ALiBi requests fail closed instead of being stripped before vllm-xpu-kernels.

Kernel dependencies

This vLLM wiring expects a vllm-xpu-kernels build that includes the following merged PRs on krisclarkdev/vllm-xpu-kernels (fork tip aa156578; not yet in the official v0.1.11.1 release wheel pinned by requirements/xpu.txt):

Kernels PR	Why this vLLM PR needs it
krisclarkdev/vllm-xpu-kernels#18	Native Xe2 MXFP8 / block-FP8 MoE (XpuFusedMoe) — required for the large MoE throughput win once XPU experts are selected
krisclarkdev/vllm-xpu-kernels#11	Softcap / ALiBi raise in FA2 — required for _xpu_ops forwarding to fail closed instead of silent ignore
krisclarkdev/vllm-xpu-kernels#15 / #19	Fail-closed attention + page128 AOT shapes / XPUGraph capture safety — required for documented VLLM_XPU_ATTN_ALLOW_FALLBACK behavior
krisclarkdev/vllm-xpu-kernels#6	Split-K mix-batch decode (kernel-only; no vLLM API change, validated on the same stack)

Docs-only kernels #20 is mirrored in the XPU install notes here but is not a runtime dependency.

Not in this PR: pinning requirements/xpu.txt to that personal fork (keeps the official release wheel). Land / release the kernels PRs above (or equivalent) into vllm-project/vllm-xpu-kernels before expecting HAL-class MoE uplift or softcap fail-closed on stock installs.

Duplicate-work check

• Searched open PRs for XPU MXFP8 / softcap / vllm-xpu-kernels wiring.
• Related but different: [XPU] Support MXFP8 gemm/bmm weights for INC DeepSeek V4 model #48476 / [Quantization][INC]Add MXFP8 Linear Support #47514 (INC MXFP8 linear), [XPU] Support Sequence Parallelism for mxfp8 on XPU #49303 (SP mxfp8), [XPU] Add online fp8 quantization test #44513 (online fp8 test). None prefer Fp8MoeBackend.XPU in the MXFP8 MoE oracle or forward softcap/ALIBI through _xpu_ops.

Changes

• oracle/mxfp8.py: on XPU, try Fp8MoeBackend.XPU first (same pattern as FP8).
• _xpu_ops.py: pass softcap / alibi_slopes into package flash_attn_varlen_func (kernels raise NotImplementedError when unimplemented).
• envs.py + XPU install docs: discoverability for VLLM_XPU_ATTN_ALLOW_FALLBACK, page128, native MoE escape hatches.

HAL Arc Pro B70 metrics (fork kernels + this wiring)

Check	Result
MoE micro MXFP8	3.17 → 0.21 ms (+1427%)
MoE micro block-FP8	3.21 → 0.16 ms (+1909%)
E2E Qwen1.5-MoE-A2.7B-Chat-MXFP8-RTN	31.0 → 738.0 tok/s (+2280%), failed=0
Dense Qwen2.5-7B-Instruct	531 tok/s median, failed=0
Fail-closed attn + softcap/ALIBI raise	PASS

Caveat on throughput: E2E A/B is native MoE vs VLLM_XPU_FUSED_MOE_USE_REF=1 under synthetic vllm bench serve (32 concurrent random prompts, 256/128, enforce-eager). Aggregate output tok/s, not single-user interactive tok/s; the ~24× is vs the slow Python expert loop, not vs prior production XPU without USE_REF.

Serve: Using 'XPU' MxFp8 MoE backend. Full write-up: fork PR krisclarkdev#1

Output-text spot check (native MXFP8 MoE)

Manual chat completions on HAL against Qwen1.5-MoE-A2.7B-Chat-MXFP8-RTN with VLLM_XPU_FUSED_MOE_NATIVE_MXFP8=1 / NATIVE_BLOCK_FP8=1, temperature 0, backend log Using 'XPU' MxFp8 MoE backend:

Prompt	Reply	OK
What is 2+2? Reply with only the number.	4.	yes
Name the capital of France in one word.	Paris.	yes
Write one short sentence about the sky.	The sky is the atmosphere that surrounds the Earth.	yes

All three finish=stop; replies are coherent and factually correct for the prompts.

Test plan

• HAL micro + E2E A/B (above)
• Fail-closed / softcap unit checks on B70
• Output-text spot check (above)
• CI XPU jobs

AI assistance

AI assistance was used for implementation and HAL runs. Submitting human reviewed the diff.

[claude]

Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

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[mergify]

Documentation preview: https://vllm--49813.org.readthedocs.build/en/49813/