Add support for building Hwacha with reduced FP precision/no FDIV/no IDIV

[jerryz123]

No description provided.

[a0u]

If unimplemented, the FMA instructions should be excluded from the decode tables so an illegal instruction assertion will be raised if used:

hwacha/src/main/scala/scalar-decode.scala

Lines 314 to 320 in f7e47e1

	VFMADD_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_MADD, N,FD_X, N,FC_X, N,FV_X, N,N) ++ FMADD_D),
	VFMSUB_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_MSUB, N,FD_X, N,FC_X, N,FV_X, N,N) ++ FMSUB_D),
	VFNMADD_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_NMADD,N,FD_X, N,FC_X, N,FV_X, N,N) ++ FNMADD_D),
	VFNMSUB_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,RX,Y,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_NMSUB,N,FD_X, N,FC_X, N,FV_X, N,N) ++ FNMSUB_D),
	VFADD_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,N,RX,N,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_ADD, N,FD_X, N,FC_X, N,FV_X, N,N) ++ FADD_D),
	VFSUB_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,N,RX,N,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_SUB, N,FD_X, N,FC_X, N,FV_X, N,N) ++ FSUB_D),
	VFMUL_D ->(List[BitPat](Y,N,N,N,Y,RX,Y,Y,RX,Y,Y,RX,Y,N,RX,N,Y,IMM_X,FN_X, DW__,A1_X, A2_X, Y,FPD,N,VM_X,M_X, N,SM_X,MT_X, N,I_X, N, N,IM_X, N,ID_X, Y,FM_MUL, N,FD_X, N,FC_X, N,FV_X, N,N) ++ FMUL_D),

This should also apply to single and half precision for consistency.

[colinschmidt]

I would suggest making all double precision operations illegal (the strange subset that exists when only DFMA is removed is unlikely to be useful) and then I would consider looking at all the other double precision functional units included (FDIV, FCMP, FCOMP) to see how much more area/power you could save.

[jerryz123]

I've revised the PR to more thoroughly remove unused FP units, and explicitly throw illegal instruction exceptions for unsupported types.