wget https://raw.githubusercontent.com/ROBOTIS-GIT/OpenCR/master/99-opencr-cdc.rules
sudo cp ./99-opencr-cdc.rules /etc/udev/rules.d/
sudo udevadm control --reload-rules
sudo udevadm trigger
sudo chmod 777 /opt
mkdir /opt/arduino-ide
cd /opt/arduino-ide
wget https://downloads.arduino.cc/arduino-ide/arduino-ide_2.3.6_Linux_64bit.zip
unzip arduino-ide_2.3.6_Linux_64bit.zip
sudo dpkg --add-architecture i386
sudo apt update && sudo apt install libasound2t64 libncurses5-dev libncurses5-dev:i386 libnss3-dev
/opt/arduino-ide/arduino-ide_2.3.6_Linux_64bit/arduino-ide
-
Open
File>Preferences- Edit
Additional boards manager URLshttps://raw.githubusercontent.com/ROBOTIS-GIT/OpenCR/master/arduino/opencr_release/package_opencr_index.json
- Edit
-
Open
Tools>Board>Board Manager...- Type
OpenCRinFilter your searchbox - Inatall
OpenCR by ROBOTIS
- Type
- https://phys-higashi.com/73/#toc8
- https://phys-higashi.com/114/#toc12
- https://github.com/Digilent/Zybo-Z7-20-pcam-5c
- https://fumimaker.net/entry/2020/02/06/002934
- https://marsee101.blog.fc2.com/blog-entry-4027.html
- https://xilinx.github.io/Vitis-Tutorials/master/docs-jp/docs-jp/Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/step1.html
- https://cellspe.matrix.jp/zerofpga/vivado_xsa.html
- https://zenn.dev/gnico/articles/2aef82b7adef44
- Project name:
AutonomousVehicle - Disable
Create project subdirectory - Select RTL Project
- Enable
Do not specify sources at this time - Disable
Project is an entensible Vitis platform
- Enable
- Download Board Data
Boards>Zybo Z7-20
wget https://raw.githubusercontent.com/Digilent/digilent-xdc/refs/heads/master/Zybo-Z7-Master.xdc -O Zybo-Z7.xdc
- Add XDC File
Flow Navigator>PROJECT MANAGER>Add Sources>Add or create constraints
- Add HDL Files
Flow Navigator>PROJECT MANAGER>Add Sources>Add or create design sources
Flow Navigator>IP GENERATOR>Create Block Design
- Add Processing System
BLOCK DESIGN>Diagram>+ button to add IP>ZYNQ7 Processing SystemBLOCK DESIGN>Diagram>Run Block Automation
- Right click Processing System Block > Customize Block
- MIO Configuration
- Set UART1
MIO 48 .. 49 - Set disable GPIO MIO50 pull-up
- Set disable GPIO MIO51 pull-up
- Clock Configuration
- Set PL Fabric Clocks > FCLK_CLK0 100
BLOCK DESIGN>Diagram>+ button to add IP>AXI GPIOBLOCK DESIGN>Diagram>Run Connection Automation- Enable S_AXI
Processing System Block>FCLK_CLK0>Create port- Set
Port nametops_clk
- Set
Processing System Block>peripheral_aresetn[0:0]>Create port- Set
Port nametops_nrst
- Set
axi_gpio_0>Customize Block- Enable
IP Configuration>Enable Dual Channel
- Enable
axi_gpio_0>GPIO +>gpio_io_i[31:0]>Create Port- Set
Port nametops_gpio_i0
- Set
axi_gpio_0>GPIO +>gpio_io_o[31:0]>Create Port- Set
Port nametops_gpio_o0
- Set
axi_gpio_0>GPIO2 +>gpio2_io_i[31:0]>Create Port- Set
Port nametops_gpio_i1
- Set
axi_gpio_0>GPIO2 +>gpio2_io_o[31:0]>Create Port- Set
Port nametops_gpio_o1
- Set
BLOCK DESIGN>Platform Setup>AXI Port- Set
EnabledofM_AXI_GP1,S_AXI_ACP,S_AXI_HP0,S_AXI_HP1,S_AXI_HP2andS_AXI_HP3
- Set
BLOCK DESIGN>Platform Setup>Clock- Set
Is DefaultofFCLK_CLK0
- Set
Diagram>Validate DesignFlow Navigator>IP Integrator>Generate Block Design>Generate- Confirm
Flow Navigator>Project Manager>Sources>Design Sources>Zynq_PS
PROJECT MANAGER>Sources>Dedign Sources>AutonomousVehicle(AutonomousVehicle.vhd)- Select
Set as Top
- Select
Flow Navigator>Synthesis>Run SynthesisFlow Navigator>Implementation>Run ImplementationFlow Navigator>Program and Debug>Generate Bitstream
File>Export>Export platform>Hardware>Include bitstream/binary- Select
Include bitstream - XSA file name:
system
- Select
- Set
File>Set WorkspacetoC:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\Vitis\
File>New Component>PlatformComponent Name:platformConponent Location:C:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\Vitis\- Enable
Select Platform Creation Flow>Hardware Design - Add
C:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\system.xsatoHardware Design (XSA) For Implementation - Set
linuxtoOperating system Finish
Flow>Component>platform>Build
File>New Component>ApplicationName and LocationComponent name:applicationComponent location:C:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\Vitis\
Select Platform:platformSysroot:C:\Users\admin\Documents\sysroots\sysroots\x86_64-petalinux-linux\Finish
application>Sources>src- Create
main.c
- Create
Flow>Component>application>Build
- Select
Flow>Component>application Vitis>Create Boot Image>Zynq- Enable
Create a new BIF file - Add
C:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\Vitis\platform\export\platform\sw\boot\fsbl.elfasbootloader - Add
C:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\AutonomousVehicle.runs\impl_1\AutonomousVehicle.bitasdatafile - Add
C:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\Vitis\application\build\application.elfasdatafile - Set
Output BIF File Pathtoc:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\system.bif - Set
Outout ImagetoC:\Users\admin\Documents\autonomous-vehicle\Zybo-Z7\BOOT.bin Create Image
- Enable
sudo apt install device-tree-compiler gpiod libgpiod-dev
gpioinfo
gcc main.c -o main -lgpiod


