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Replace hand-built board with XiaoBoard from @tscircuit/common - #39

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Open

Replace hand-built board with XiaoBoard from @tscircuit/common#39
js360000 wants to merge 1 commit into
tscircuit:mainfrom
js360000:bountybox/issue-2

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Summary

feat: replace hand-built board with XiaoBoard from @tscircuit/common (#2)

Adopt the shared XIAO breakout from the new @tscircuit/common module
instead of maintaining the bespoke PinOutCircuit stamp-board chip
inline. The Waveshare RP2040-Zero is a XIAO-form-factor board, so the
upstream component already encodes the correct edge pad layout, pin
labels, schematic arrangement, and plated-hole geometry.

Changes:

  • Add @tscircuit/common@^0.0.42 to dependencies.
  • index.tsx: replace <board> + <PinOutCircuit /> with
    <XiaoBoard variant="RP2040" withPlatedHoles boardProps={…}> and
    hold the remaining subcircuits (VoltageRegulator, LedCircuit,
    FlashCircuit, CrystalCircuit, RP2040Circuit) as children. Pass the
    existing routingDisabled + schMaxTraceDistance flags through
    boardProps so the previous board-level behaviour is preserved.
  • __snapshots__/: add PCB + schematic snapshots produced by
    tsci snapshot index.tsx so the new top-level can be regression-
    tested against future XiaoBoard upstream changes.

PinOutCircuit is left in lib/ untouched — keeping the file in the
tree avoids breaking any out-of-tree imports while the migration
settles, and the lib component is no longer instantiated from
index.tsx.

bun run build and bunx tsci snapshot index.tsx succeed locally.
The two key-prop warnings under XiaoBoardFootprint and
RP2040Circuit are pre-existing render-time warnings inside those
components and are not introduced by this change.

Closes #2

Diff

 __snapshots__/index-pcb.snap.svg       |   1 +
 __snapshots__/index-schematic.snap.svg | 104 +++++++++++++++++++++++++++++++++
 bun.lock                               |   6 ++
 index.tsx                              |  12 ++--
 package.json                           |   3 +
 5 files changed, 121 insertions(+), 5 deletions(-)

Claim

/claim #2

…scircuit#2)

Adopt the shared XIAO breakout from the new `@tscircuit/common` module
instead of maintaining the bespoke `PinOutCircuit` stamp-board chip
inline. The Waveshare RP2040-Zero is a XIAO-form-factor board, so the
upstream component already encodes the correct edge pad layout, pin
labels, schematic arrangement, and plated-hole geometry.

Changes:
- Add `@tscircuit/common@^0.0.42` to dependencies.
- `index.tsx`: replace `<board>` + `<PinOutCircuit />` with
  `<XiaoBoard variant="RP2040" withPlatedHoles boardProps={…}>` and
  hold the remaining subcircuits (VoltageRegulator, LedCircuit,
  FlashCircuit, CrystalCircuit, RP2040Circuit) as children. Pass the
  existing `routingDisabled` + `schMaxTraceDistance` flags through
  `boardProps` so the previous board-level behaviour is preserved.
- `__snapshots__/`: add PCB + schematic snapshots produced by
  `tsci snapshot index.tsx` so the new top-level can be regression-
  tested against future XiaoBoard upstream changes.

`PinOutCircuit` is left in `lib/` untouched — keeping the file in the
tree avoids breaking any out-of-tree imports while the migration
settles, and the lib component is no longer instantiated from
`index.tsx`.

`bun run build` and `bunx tsci snapshot index.tsx` succeed locally.
The two key-prop warnings under `XiaoBoardFootprint` and
`RP2040Circuit` are pre-existing render-time warnings inside those
components and are not introduced by this change.

Closes tscircuit#2
@tscircuit
tscircuit Bot requested a deployment to Preview May 16, 2026 17:12 Abandoned
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Finish the RP2040-zero board

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