Use pour net mapping for RK3326 supply fanout

[seveibar]

Summary

• replace 205 singleton supply buses with ordinary source-only traces
• declare GND on inner1 and all 23 isolated power rails on inner2 through one fanoutPourNetMap
• key optional per-drop escape directions by source-trace name
• export RK3326_POWER_RAIL_NETS
• update to tscircuit@0.0.2185, which includes the merged pour-net inference support
• document copper-pour inference and extend the package tests

PCB snapshot

Generated with npx tsci snapshot index.circuit.tsx --pcb-only --update.

Dependencies

• Infer fanout plane drops from copper pours core#2929 is merged and released in @tscircuit/core@0.0.1554 / tscircuit@0.0.2185
• Respect routed via layer spans core#2944 is required so routed top -> inner1/inner2 supply drops remain blind vias instead of being materialized as full-stack through-vias

Merge after core#2944 is merged and released.

Validation

• bun run typecheck
• bun test tests/rk3326.test.ts — 8 passed, 603 assertions
• end-to-end tsci build index.circuit.tsx --all-images --ignore-warnings against core#2944 — zero circuit errors
• bun run validate:footprint against core#2944
• generated circuit contains 154 top -> inner1 ground drops and 51 top -> inner2 power drops