fix(pinrow): pitch-aware id/od defaults so 1.27 mm headers don't overlap

[gsdali]

Summary

pinrow's default id="1.0mm" / od="1.5mm" are tuned for the 0.1in (2.54 mm) pitch and produce fab-breaking overlap at smaller pitches. Concretely, at the standard ARM Cortex Debug pitch of 1.27 mm with default od=1.5mm, adjacent plated holes overlap by 0.23 mm.

Fix

Make id and od optional in the schema; compute defaults from pitch in the transform:

// Pitch-aware id/od defaults. Backward-compatible at 2.54 mm pitch.
const od = data.od ?? Math.min(1.5, data.p - 0.27)
const id = data.id ?? Math.min(1.0, od - 0.4)

Pitch	New default od	New default id	Notes
2.54 mm (0.1")	1.5 mm	1.0 mm	Unchanged — backward compatible
2.0 mm	1.5 mm	1.0 mm	Still fits with 0.5 mm clearance
1.27 mm (0.05", Cortex Debug)	1.0 mm	0.6 mm	Matches generic JLCPCB 1.27 mm headers (e.g. ZX_PZ1_27_2_5PZZ)
explicit user values	honoured	honoured	No override of explicit id/od at any pitch

Test plan

• All 25 existing pinrow tests pass unchanged (default-pitch behaviour preserved)
• New tests/pinrow_pitch_aware_defaults.test.ts adds:
  • default pitch backward-compat (p=2.54mm → id=1.0/od=1.5)
  • small-pitch defaults scale down (p=1.27mm → od ≤ p − 0.2, annular ring ≥ 0.3 mm)
  • explicit id/od override defaults at any pitch
• bun test: 415 pass (one flaky timeout in slop1.test.ts unrelated to this change, passed on rerun)
• bun run format: clean

Repro

<board width="22mm" height="20mm">
  <pinheader name="J1" pinCount={10} pitch="1.27mm" doubleRow />
</board>

Before this PR, tsci build reports the resulting plated holes as 1.5 mm OD and they overlap. With this PR, defaults become 1.0 mm OD / 0.6 mm drill — same as the typical JLCPCB Cortex Debug header SKU.

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