🤖 SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

Demonstration how to build a Management Web interface to interact with the FPGA fabric and change the FPGA configuration with the Django Framework

FPGA实验用DE10-Standard开发板引脚表

Copy of: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1081

SoC and Embedded Linux

Copy of: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1081

FPGA-based edge detection with salt-and-pepper denoising was successfully implemented on the DE10-Standard board, and results were displayed on a VGA display.

FPGA Matrix Multipler for DE10 Standard FPGA Board

Đồ án Hệ thống nhúng HCMUS FETEL: DE10-Standard Cyclone V SoC FPGA nhận lệnh TCP/Ethernet từ PC/Android, xử lý trên HPS/Linux, ghi bridge HPS-FPGA và hiển thị HEX0..HEX5.

Slide bảo vệ Đồ án Hệ thống nhúng Nhóm 17 (22DTV_CLC): SoC FPGA DE10-Standard nhận lệnh TCP/Ethernet từ PC/Android, xử lý trên HPS/Linux và hiển thị LED 7 đoạn; deck Typst/Touying Stargazer 16:9 kèm preview, GIF motion và release PDF.

Bộ lab FPGA/SoPC HCMUS: Quartus/Platform Designer, Verilog Avalon-MM IP, Nios II C, PIO, timer, DMA, HEX LED và ghi chú Typst.