OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph level prediction problems in chip design.
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Updated
Jul 23, 2025 - Verilog
OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph level prediction problems in chip design.
Systematic benchmark of peephole optimization across 15 quantum circuit families. Discovers listing model sensitivity and prototype action-space ceilings.
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