Add SIMD implementations of Salsa#5759
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Basically mirroring the approach used for ChaCha, with generic 128-bit SIMD (SSSE3/NEON/etc), AVX2, and AVX-512 implementations. On Intel Tiger Lake, improves Salsa20 write_keystream cycles per byte results by up to 9x: | Impl | CPB | | -------- | ---- | | Baseline | 3.92 | | SSSE3 | 1.88 | | AVX2 | .95 | | AVX512 | .42 |
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Pull request overview
This PR adds SIMD-accelerated Salsa20 implementations (generic 128-bit SIMD, AVX2, AVX-512) following the existing ChaCha dispatch/parallelism pattern, and expands the stream-cipher test suite to better exercise large one-shot keystream generation.
Changes:
- Add runtime-dispatched multi-block Salsa20 core (
salsa20(...)) andgenerate_keystream(...), with buffer sizing based on detected SIMD parallelism. - Introduce new Salsa20 SIMD backends: SIMD_4x32 x4, AVX2 x8, AVX-512 x16.
- Extend/adjust test vectors and tests (incl. large one-shot
write_keystream) and align SIMD feature naming (ssse3) in vector headers.
Reviewed changes
Copilot reviewed 18 out of 18 changed files in this pull request and generated 2 comments.
Show a summary per file
| File | Description |
|---|---|
| src/tests/test_stream.cpp | Adds a one-shot write_keystream test case to exercise multi-block refill paths. |
| src/tests/data/stream/salsa20.vec | Adds cpuid feature header and large test vectors to cover long keystream generation paths across providers. |
| src/tests/data/stream/chacha.vec | Updates cpuid feature header to use ssse3 (matching SIMD_4x32 requirements). |
| src/lib/utils/simd/simd_avx512/simd_avx512.h | Adds SIMD_16x32::unsigned_lt used for counter carry detection in AVX-512 paths. |
| src/lib/utils/simd/simd_avx2/simd_avx2.h | Adds SIMD_8x32::unsigned_lt used for counter carry detection in AVX2 paths. |
| src/lib/utils/simd/simd_4x32/simd_4x32.h | Adds SIMD_4x32::unsigned_lt used for counter carry detection in SIMD_4x32 paths. |
| src/lib/stream/salsa20/salsa20.h | Declares provider reporting, keystream generation override, and SIMD backend entry points. |
| src/lib/stream/salsa20/salsa20.cpp | Implements provider/parallelism selection, multi-block Salsa20 core dispatch, and generate_keystream. |
| src/lib/stream/salsa20/salsa20_simd32/salsa20_simd32.cpp | Adds SIMD_4x32 x4 Salsa20 implementation with correct counter carry handling. |
| src/lib/stream/salsa20/salsa20_simd32/info.txt | Declares SIMD_4x32 Salsa20 module metadata and ISA requirements. |
| src/lib/stream/salsa20/salsa20_avx2/salsa20_avx2.cpp | Adds AVX2 x8 Salsa20 implementation. |
| src/lib/stream/salsa20/salsa20_avx2/info.txt | Declares AVX2 Salsa20 module metadata. |
| src/lib/stream/salsa20/salsa20_avx512/salsa20_avx512.cpp | Adds AVX-512 x16 Salsa20 implementation. |
| src/lib/stream/salsa20/salsa20_avx512/info.txt | Declares AVX-512 Salsa20 module metadata. |
| src/lib/stream/chacha/chacha_simd32/chacha_simd32.cpp | Refactors counter carry computation to use the new unsigned-lt mask helper. |
| src/lib/stream/chacha/chacha_avx2/chacha_avx2.cpp | Refactors counter carry computation to use the new unsigned-lt mask helper. |
| src/lib/stream/chacha/chacha_avx512/chacha_avx512.cpp | Refactors counter carry computation to use the new unsigned-lt mask helper. |
| doc/dev_ref/todo.rst | Removes the Salsa SIMD optimization TODO now that it’s implemented. |
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| */ | ||
| SIMD_8x32 BOTAN_FN_ISA_AVX2 unsigned_lt(const SIMD_8x32& other) const noexcept { | ||
| // No unsigned comparison before AVX-512; bias into the signed domain | ||
| const __m256i bias = _mm256_set1_epi32(static_cast<int32_t>(0x80000000)); |
| SIMD_4x32 BOTAN_FN_ISA_SIMD_4X32 unsigned_lt(const SIMD_4x32& other) const noexcept { | ||
| #if defined(BOTAN_SIMD_USE_SSSE3) | ||
| // No unsigned comparison before AVX-512; bias into the signed domain | ||
| const __m128i bias = _mm_set1_epi32(static_cast<int32_t>(0x80000000)); |
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Basically mirroring the approach used for ChaCha, with generic 128-bit SIMD (SSSE3/NEON/etc), AVX2, and AVX-512 implementations.
On Intel Tiger Lake, improves Salsa20 write_keystream cycles per byte results by up to 9x: