[cpullvm] - Prepare for LIBCXX tests enablement ARM/RISC-V.

qualcomm-software/embedded-multilib/json/variants/aarch64a_tlsie.json

@@ -19,7 +19,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF",
+            "ENABLE_LIBCXX_TESTS": "ON",
             "TLS_MODEL": "initial-exec"
         }
     }

qualcomm-software/embedded-multilib/json/variants/armv7a_hard_vfpv3.json

@@ -20,7 +20,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         }
     }
 }

qualcomm-software/embedded-multilib/json/variants/armv7a_soft_neon.json

@@ -20,7 +20,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         },
         "musl-embedded": {
             "ENABLE_CXX_LIBS": "ON",

qualcomm-software/embedded-multilib/json/variants/armv7a_soft_nofp.json

@@ -20,7 +20,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         },
         "musl-embedded": {
             "ENABLE_CXX_LIBS": "ON",

qualcomm-software/embedded-multilib/json/variants/armv7m_hard_fpv5_d16_nopic.json

@@ -19,7 +19,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         }
     }
 }

qualcomm-software/embedded-multilib/json/variants/armv7m_soft_nofp.json

@@ -19,7 +19,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         },
         "musl-embedded": {
             "ENABLE_CXX_LIBS": "ON",

qualcomm-software/embedded-multilib/json/variants/armv7m_soft_nofp_nopic.json

@@ -19,7 +19,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         }
     }
 }

qualcomm-software/embedded-multilib/json/variants/armv8_soft_neon.json

@@ -19,7 +19,7 @@
             "ENABLE_CXX_LIBS": "ON",
             "ENABLE_LIBC_TESTS": "ON",
             "ENABLE_COMPILER_RT_TESTS": "ON",
-            "ENABLE_LIBCXX_TESTS": "OFF"
+            "ENABLE_LIBCXX_TESTS": "ON"
         },
         "musl-embedded": {
             "ENABLE_CXX_LIBS": "ON",

qualcomm-software/embedded-runtimes/CMakeLists.txt

@@ -235,12 +235,15 @@ if(ENABLE_LIBC_TESTS OR ENABLE_COMPILER_RT_TESTS OR ENABLE_LIBCXX_TESTS)
 endif()
 
 set(compile_arch_flags "--target=${target_triple} ${COMPILE_FLAGS} --sysroot ${TEMP_LIB_DIR}")
+if(NOT C_LIBRARY STREQUAL musl-embedded)
+    # Apply the same TLS model to test compilation as is used for library builds.
+    # Without this, -fPIC variants default to general-dynamic TLS which emits
+    # __tls_get_addr calls that are not available on bare-metal.
+    string(APPEND compile_arch_flags " -ftls-model=${TLS_MODEL}")
+endif()
 # Compiling the libraries benefits from some extra optimization
 # flags, and requires a sysroot.
 set(lib_compile_flags "${compile_arch_flags} -ffunction-sections -fdata-sections")
-if(NOT C_LIBRARY STREQUAL musl-embedded)
-    string(APPEND lib_compile_flags " -ftls-model=${TLS_MODEL}")
-endif()
 
 # Generic target names for the C library.
 # Declare these now, since compiler-rt requires the 'install' dependency.

qualcomm-software/embedded-runtimes/test-support/xfails.py

@@ -151,6 +151,233 @@ def check_r52_warning():
             ],
             description="Disable the tests for now while the issue is being fixed upstream (https://github.com/picolibc/picolibc/pull/1072).",
         ),
+        XFail(
+            name="flat-container-oom-armv7m",
+            testnames=[
+                # flat.map/size and flat.set/size insert 1,000,000 elements at runtime,
+                # exceeding the available RAM on armv7m bare-metal targets (8MB).
+                # armv7a and armv8 have 16MB RAM and pass these tests.
+                "std/containers/container.adaptors/flat.map/flat.map.capacity/size.pass.cpp",
+                "std/containers/container.adaptors/flat.set/flat.set.capacity/size.pass.cpp",
+            ],
+            result=NewResult.XFAILED,
+            project="libcxx",
+            variants=[
+                "armv7m_soft_nofp",
+                "armv7m_soft_nofp_nopic",
+                "armv7m_hard_fpv5_d16_nopic",
+            ],
+            description="flat.map/size and flat.set/size insert 1,000,000 elements at "
+                        "runtime, exceeding the 8MB RAM on armv7m bare-metal QEMU targets. "
+                        "armv7a/armv8 have 16MB RAM and pass. The test aborts with exit 1.",
+        ),
+        XFail(
+            name="sort-heap-complexity-armv7m",
+            testnames=[
+                # sort.heap/complexity and ranges_sort_heap use std::mt19937 seeded
+                # from std::random_device. On armv7m bare-metal the random_device falls
+                # back to a fixed seed; the complexity assertion then fails.
+                # armv7a and armv8 pass these tests.
+                "std/algorithms/alg.sorting/alg.heap.operations/sort.heap/complexity.pass.cpp",
+                "std/algorithms/alg.sorting/alg.heap.operations/sort.heap/ranges_sort_heap.pass.cpp",
+            ],
+            result=NewResult.XFAILED,
+            project="libcxx",
+            variants=[
+                "armv7m_soft_nofp",
+                "armv7m_soft_nofp_nopic",
+                "armv7m_hard_fpv5_d16_nopic",
+            ],
+            description="sort.heap complexity tests use std::random_device which falls "
+                        "back to a fixed seed on armv7m bare-metal, causing the complexity "
+                        "assertion to fail. armv7a/armv8 pass. Exits with code 1.",
+        ),
+        XFail(
+            name="simd-unary-compiler-crash-armv7a",
+            testnames=[
+                # simd_unary.pass.cpp triggers a clang compiler assertion:
+                # ScalarizeVecOp_VSETCC: N->getValueType(0) == MVT::v1i1
+                # in LegalizeVectorTypes.cpp when compiling std::experimental::simd
+                # on ARMv7-A with NEON. This is a compiler bug, not a test failure.
+                "std/experimental/simd/simd.class/simd_unary.pass.cpp",
+            ],
+            result=NewResult.EXCLUDE,
+            project="libcxx",
+            variants=[
+                "armv7a_soft_neon",
+                "armv8_soft_neon",
+            ],
+            description="simd_unary.pass.cpp triggers a clang assertion failure "
+                        "(ScalarizeVecOp_VSETCC: expected v1i1 type) in "
+                        "LegalizeVectorTypes.cpp when compiling std::experimental::simd "
+                         "on ARMv7-A/ARMv8 with NEON. Compiler bug; exclude until fixed.",
+        ),
+        XFail(
+            name="long-double-picolibc-aarch64",
+            testnames=[
+                # These tests fail on aarch64 bare-metal variants because long double
+                # is 128-bit on AArch64 and picolibc does not support stdio for 128-bit
+                # long doubles.
+                "std/strings/string.conversions/stold.pass.cpp",
+                "std/strings/string.conversions/to_string.pass.cpp",
+                "std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_overlong.pass.cpp",
+                "std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_long_double.hex.pass.cpp",
+                "std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_long_double.pass.cpp",
+                "std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/long_double.pass.cpp",
+            ],
+            result=NewResult.XFAILED,
+            project="libcxx",
+            variants=[
+                "aarch64a_tlsie",
+                "aarch64a_soft_nofp_tlsie",
+            ],
+            description="Long double is 128-bit on AArch64 and conversion between 128-bit "
+                        "types and strings is broken in picolibc. ARM 32-bit is unaffected "
+                        "(64-bit long double).",
+        ),
+        XFail(
+            name="coroutines-aeabi-unwind-arm",
+            testnames=[
+                # end.to.end tests instantiate real coroutine frames, which
+                # cause the compiler to emit .ARM.exidx unwind tables even
+                # with -fno-exceptions.  The ARM EABI personality routine
+                # __aeabi_unwind_cpp_pr0 referenced by those tables is absent
+                # in the bare-metal semihosting runtime.
+                "std/language.support/support.coroutines/end.to.end/",
+                # These two sub-directories also create coroutine frames:
+                "std/language.support/support.coroutines/coroutine.handle/coroutine.handle.noop/",
+                "std/language.support/support.coroutines/coroutine.handle/coroutine.handle.prom/",
+            ],
+            result=NewResult.EXCLUDE,
+            project="libcxx",
+            variants=[
+                "armv8_soft_neon",
+                "armv7a_soft_neon",
+                "armv7a_soft_nofp",
+                "armv7a_hard_vfpv3",
+                "armv7m_soft_nofp",
+                "armv7m_soft_nofp_nopic",
+                "armv7m_hard_fpv5_d16_nopic",
+            ],
+            description="Coroutine tests that instantiate real coroutine frames emit .ARM.exidx "
+                        "unwind tables referencing __aeabi_unwind_cpp_pr0, which is absent in "
+                        "the bare-metal semihosting runtime. Exclude for ARM variants built "
+                        "with ENABLE_EXCEPTIONS=OFF.",
+        ),
+        XFail(
+            name="odr-signature-exceptions-arm-nofp",
+            testnames=[
+                "extensions/libcxx/odr_signature.exceptions.sh.cpp",
+            ],
+            result=NewResult.EXCLUDE,
+            project="libcxx",
+            variants=[
+                # ARM bare-metal variants built with ENABLE_EXCEPTIONS=OFF.
+                # The test links a TU compiled with -fexceptions against one
+                # compiled with -fno-exceptions; the -fexceptions TU emits
+                # ARM EABI unwind tables that reference __aeabi_unwind_cpp_pr0,
+                # which is not provided by the bare-metal semihosting runtime.
+                "armv8_soft_neon",
+                "armv7a_soft_neon",
+                "armv7a_soft_nofp",
+                "armv7a_hard_vfpv3",
+                "armv7m_soft_nofp",
+                "armv7m_soft_nofp_nopic",
+                "armv7m_hard_fpv5_d16_nopic",
+            ],
+            description="odr_signature.exceptions.sh.cpp mixes -fno-exceptions and -fexceptions TUs. "
+                        "The -fexceptions TU emits ARM EABI unwind tables referencing "
+                        "__aeabi_unwind_cpp_pr0, which is absent in the bare-metal semihosting "
+                        "runtime. Exclude for ARM variants built with ENABLE_EXCEPTIONS=OFF.",
+        ),
+        XFail(
+            name="at_exit",
+            testnames=[
+                "std/language.support/support.start.term/quick_exit.pass.cpp",
+            ],
+            result=NewResult.XFAILED,
+            project="libcxx",
+            description="at_quick_exit symbol is not found in the picolibc semihosting runtime.",
+        ),
+        XFail(
+            name="uchar-cuchar-xpass-picolibc",
+            testnames=[
+                # These tests carry XFAIL: LIBCXX-PICOLIBC-FIXME upstream (mbrtoc16 not
+                # defined). However, picolibc does define mbrtoc16/c16rtomb, so the tests
+                # actually pass on all our bare-metal variants. Mark as expected-pass to
+                # suppress the XPASS (unexpected pass) result from lit.
+                "std/depr/depr.c.headers/uchar_h.compile.pass.cpp",
+                "std/strings/c.strings/cuchar.compile.pass.cpp",
+            ],
+            result=NewResult.PASSED,
+            project="libcxx",
+            description="uchar_h and cuchar compile tests are XFAIL upstream for picolibc "
+                        "(mbrtoc16 not defined), but picolibc does define mbrtoc16/c16rtomb "
+                        "so they pass on all our bare-metal variants. Suppress XPASS.",
+        ),
+        XFail(
+            name="cmath-soft-float-precision",
+            testnames=[
+                "std/numerics/c.math/cmath.pass.cpp",
+            ],
+            result=NewResult.XFAILED,
+            project="libcxx",
+            variants=[
+                # AArch64 soft-float: std::sqrt(long double) gives incorrect results
+                # on AArch64 soft-float builds (-march=armv8-a+nofp+nosimd -mabi=aapcs-soft).
+                # The 3-argument std::hypot precision assertion fails because it relies on
+                # sqrt(2) being accurate. See ATfE 'sqrt precision on softnofp' xfail.
+                "aarch64a_soft_nofp_tlsie",
+            ],
+            description="cmath.pass.cpp fails on AArch64 soft-float builds where "
+                        "std::sqrt(long double) gives incorrect results. The 3-argument "
+                        "std::hypot precision assertion fails because it relies on sqrt(2) "
+                        "being accurate.",
+        ),
+        XFail(
+            name="cas-non-power-of-2-no-generic-atomic",
+            testnames=[
+                "std/atomics/atomics.types.generic/cas_non_power_of_2.pass.cpp",
+            ],
+            result=NewResult.EXCLUDE,
+            project="libcxx",
+            variants=[
+                # cas_non_power_of_2.pass.cpp tests atomic operations on structs of sizes
+                # 3, 5, and 6 bytes.  These non-power-of-2 sizes require the generic
+                # (unsized) libcalls __atomic_load / __atomic_compare_exchange, which are
+                # lock-based fallbacks not provided by libclang_rt.builtins.a on any of
+                # our bare-metal targets.
+                #
+                # ARM variants: sizes 3/5/6 have no hardware atomic instruction and fall
+                # back to __atomic_load / __atomic_compare_exchange.
+                "armv8_soft_neon",
+                "armv7a_soft_neon",
+                "armv7a_soft_nofp",
+                "armv7a_hard_vfpv3",
+                "armv7m_soft_nofp",
+                "armv7m_soft_nofp_nopic",
+                "armv7m_hard_fpv5_d16_nopic",
+            ],
+            description="cas_non_power_of_2.pass.cpp tests atomic operations on structs of "
+                        "sizes 3, 5, and 6 bytes, which require the generic (unsized) libcalls "
+                        "__atomic_load / __atomic_compare_exchange.  These lock-based fallbacks "
+                        "are not provided by libclang_rt.builtins.a on our bare-metal ARM targets.",
+        ),
+        XFail(
+            name="no-c8rtomb-verify-picolibc",
+            testnames=[
+                # no_c8rtomb_mbrtoc8.verify.cpp expects c8rtomb/mbrtoc8 to be absent
+                # (expected-error: no member named 'c8rtomb'). Picolibc provides these
+                # symbols, so the expected errors do not fire and the verify test fails.
+                # Exclude rather than xfail: the test premise does not apply to picolibc.
+                "std/strings/c.strings/no_c8rtomb_mbrtoc8.verify.cpp",
+            ],
+            result=NewResult.EXCLUDE,
+            project="libcxx",
+            description="Picolibc provides c8rtomb/mbrtoc8, so the verify test's expected "
+                        "errors ('no member named c8rtomb') do not fire. Exclude since the "
+                        "test premise does not apply to picolibc targets.",
+        ),
         XFail(
             name="emulated crash signals",
             testnames=[

qualcomm-software/scripts/test.sh

@@ -17,8 +17,5 @@ set -ex
 SCRIPT_DIR=$( cd -- "$( dirname -- "${BASH_SOURCE[0]}" )" &> /dev/null && pwd )
 REPO_ROOT=$( git -C "${SCRIPT_DIR}" rev-parse --show-toplevel )
 
-# Run all relevant test targets. This might be too broad eventually,
-# but while we have a limited number of variants (and no compiler-rt
-# or libc++ testing enabled) we can run everything.
 cd "${REPO_ROOT}"/build
-ninja check-all-llvm-toolchain
+ninja check-cxx

qualcomm-software/scripts/test_libcxx.sh

@@ -0,0 +1,28 @@
+#!/usr/bin/env bash
+
+# Copyright (c) 2025, Arm Limited and affiliates.
+# Part of the Arm Toolchain project, under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+#
+# Changes from Qualcomm Technologies, Inc. are provided under the following license:
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 
+# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+
+# A bash script to run the libc++ tests for the Qualcomm embedded toolchain.
+#
+# These tests are kept separate from test.sh because ninja check-cxx takes
+# significantly longer to run than the rest of the test suite.  Run this
+# script in addition to test.sh when libc++ test coverage is required.
+#
+# The script assumes a successful build of the toolchain exists in the 'build'
+# directory inside the repository tree.
+
+set -ex
+
+SCRIPT_DIR=$( cd -- "$( dirname -- "${BASH_SOURCE[0]}" )" &> /dev/null && pwd )
+REPO_ROOT=$( git -C "${SCRIPT_DIR}" rev-parse --show-toplevel )
+
+# Run libc++ tests using Ninja.
+cd "${REPO_ROOT}"/build
+ninja check-cxx