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pauliano22/README.md

Paul Iacobucci

CS @ Cornell University (minors in AI and Applied Economics) — I build machine learning systems close to the metal: GPU kernels, edge inference, and hardware-accelerated pipelines.

Currently:

  • 🔬 ML Research Assistant @ Cornell Zhang Research Group — profiling frontier MoE models on 8x H100 clusters to guide custom AI silicon design
  • 📡 ML Engineer Intern @ L3Harris Technologies — real-time, on-device text-to-speech on embedded military radios (INT8 quantization, ONNX Runtime, ARM NEON)

Selected work:

Project What it is
hft-fpga FPGA trading engine: 444ns tick-to-signal from live ITCH 5.0 data, 83.3M msgs/sec pipelined limit order book
triton-gpu-kernels Handwritten Triton kernels for H100 — fused FP8 LayerNorm, FlashAttention with online softmax
mini-tensorrt A from-scratch C++ inference compiler: ONNX parsing, operator fusion, kernels that match ONNX Runtime exactly
Winston Agentic AI middleware — a circuit breaker that stops runaway LLM agent loops and enforces token budgets
scout Full-stack platform connecting Cornell student-athletes with alumni (Next.js, Supabase, 45k+ records)
LockedIn Swipe-centric networking app in Swift — "Best UI" @ Cornell AppDev Hack Challenge

Elsewhere: pauliacobucci.com · LinkedIn · pmi22@cornell.edu

Pinned Loading

  1. akh1lk/vocera akh1lk/vocera Public

    DeepFake Detection Via Voice Authentication - UC Berkeley AI Hackathon 2025

    TypeScript

  2. hft-fpga hft-fpga Public

    Ultra-low latency (444ns) MoE HFT engine on FPGA. Implements a 350MHz pipelined LOB and Sparse Mixture of Experts (MoE) for 83.3M msg/sec line-rate signal generation.

    C++ 3

  3. triton-gpu-kernels triton-gpu-kernels Public

    High-performance Triton kernels for NVIDIA H100. Implements fused FP8 LayerNorm, tiled FlashAttention, and SRAM-optimized memory primitives for Hopper architecture.

    Python