SPECS: linux: refresh patchset

SPECS/linux/0222-FROMLIST-riscv-mm-Move-dma_contiguous_reserve-after-.patch

@@ -0,0 +1,74 @@
+From 3d8030b08d755d8219924a0e54e1b4857a3a5d4a Mon Sep 17 00:00:00 2001
+From: Eder Zulian <ezulian@redhat.com>
+Date: Tue, 14 Jul 2026 20:56:48 +0200
+Subject: [RUYI PATCH] FROMLIST: riscv: mm: Move dma_contiguous_reserve() after
+ NUMA initialization
+
+Move the dma_contiguous_reserve() call from setup_bootmem() to
+misc_mem_init(), placing it after arch_numa_init(). This ensures that
+NUMA topology is initialized when reserving contiguous memory for DMA.
+
+Tested with CMA_SIZE_PERNUMA enabled and two NUMA nodes on QEMU:
+
+qemu-system-riscv64 \
+	-machine virt \
+	-nographic \
+	-smp 2 -m 512M \
+	-numa node,nodeid=0,cpus=0,memdev=m0 \
+	-numa node,nodeid=1,cpus=1,memdev=m1 \
+	-object memory-backend-ram,id=m0,size=256M \
+	-object memory-backend-ram,id=m1,size=256M \
+	-kernel arch/riscv/boot/Image \
+	-append "console=ttyS0 earlycon loglevel=7 cma=16M"
+
+Unpatched kernel's log (one global CMA pool and no per-nodepools, 16 MiB
+cma-reserved):
+
+	[    0.000000] cma: Reserved 16 MiB at 0x000000009ee00000
+	...
+	[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000008fffffff]
+	[    0.000000] Initmem setup node 1 [mem 0x0000000090000000-0x000000009fffffff]
+	...
+	[    0.056397] smp: Brought up 2 nodes, 2 CPUs
+	[    0.066135] Memory: 449288K/524288K available (12279K kernel code, 5980K rwdata, 6144K rodata, 2467K init, 482K bss, 54504K reserved, 16384K cma-reserved)
+
+Patched kernel's log (three CMA pools are created, 48 MiB total),
+
+	[    0.000000] cma: Reserved 16 MiB at 0x000000009ee00000
+	[    0.000000] cma: Reserved 16 MiB at 0x000000008ee00000
+	[    0.000000] cma: Reserved 16 MiB at 0x000000009de00000
+	...
+	[    0.054251] smp: Brought up 2 nodes, 2 CPUs
+	[    0.064082] Memory: 416520K/524288K available (12279K kernel code, 5980K rwdata, 6144K rodata, 2467K init, 482K bss, 54504K reserved, 49152K cma-reserved)
+
+Signed-off-by: Eder Zulian <ezulian@redhat.com>
+Link: https://lore.kernel.org/r/20260714185648.1082483-1-ezulian@redhat.com
+Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
+---
+ arch/riscv/mm/init.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
+index 2ec9a9df20cb..86b0527d993e 100644
+--- a/arch/riscv/mm/init.c
++++ b/arch/riscv/mm/init.c
+@@ -303,8 +303,6 @@ static void __init setup_bootmem(void)
+ 	 */
+ 	if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
+ 		memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
+-
+-	dma_contiguous_reserve(dma32_phys_limit);
+ }
+
+ #ifdef CONFIG_RELOCATABLE
+@@ -1363,6 +1361,7 @@ void __init misc_mem_init(void)
+ {
+ 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
+ 	arch_numa_init();
++	dma_contiguous_reserve(dma32_phys_limit);
+ #ifdef CONFIG_SPARSEMEM_VMEMMAP
+ 	/* The entire VMEMMAP region has been populated. Flush TLB for this region */
+ 	local_flush_tlb_kernel_range(VMEMMAP_START, VMEMMAP_END);
+-- 
+2.53.0
+

SPECS/linux/0223-FROMLIST-dt-bindings-soc-spacemit-k3-add-i2s_sysclk-.patch

@@ -0,0 +1,40 @@
+From e7f3a9d454260acfb0b7c9f92e06658628c5d320 Mon Sep 17 00:00:00 2001
+From: Troy Mitchell <troy.mitchell@linux.spacemit.com>
+Date: Fri, 17 Jul 2026 00:26:01 -0700
+Subject: [RUYI PATCH] FROMLIST: dt-bindings: soc: spacemit: k3: add
+ i2s_sysclk, i2s_bclk_factor and i2s1_sysclk_src IDs
+
+Add three new clock IDs to expose clocks introduced by the topology fix:
+- CLK_MPMU_I2S_SYSCLK (51): the common i2s sysclk DDN at MPMU_ISCCR1
+- CLK_MPMU_I2S_BCLK_FACTOR (52): the implicit /2 factor feeding i2s_bclk
+- CLK_MPMU_I2S1_SYSCLK_SRC (53): the dedicated i2s1 sysclk source mux
+
+CLK_MPMU_I2S1_SYSCLK keeps its existing ID (47) but will be repointed to
+the real per-instance i2s1 clock in a subsequent patch. No in-tree user
+references this ID so the semantic change is contained.
+
+Fixes: efe897b557e2 ("dt-bindings: soc: spacemit: k3: add clock support")
+Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
+Link: https://lore.kernel.org/r/20260717-k3-clk-fix-i2s-v1-1-e95001a692ee@linux.spacemit.com
+Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
+---
+ include/dt-bindings/clock/spacemit,k3-clocks.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/include/dt-bindings/clock/spacemit,k3-clocks.h b/include/dt-bindings/clock/spacemit,k3-clocks.h
+index 69978ab0b29f..4f1099f5da1c 100644
+--- a/include/dt-bindings/clock/spacemit,k3-clocks.h
++++ b/include/dt-bindings/clock/spacemit,k3-clocks.h
+@@ -145,6 +145,9 @@
+ #define CLK_MPMU_I2S3_SYSCLK     48
+ #define CLK_MPMU_I2S4_SYSCLK     49
+ #define CLK_MPMU_I2S5_SYSCLK     50
++#define CLK_MPMU_I2S_SYSCLK      51
++#define CLK_MPMU_I2S_BCLK_FACTOR 52
++#define CLK_MPMU_I2S1_SYSCLK_SRC 53
+
+ /* APBC clocks */
+ #define CLK_APBC_UART0           0
+-- 
+2.53.0
+

SPECS/linux/0224-FROMLIST-clk-spacemit-k3-fix-i2s-clock-topology.patch

@@ -0,0 +1,115 @@
+From 75ce305dab9cd4feeeb740270f76cf4c5845650e Mon Sep 17 00:00:00 2001
+From: Troy Mitchell <troy.mitchell@linux.spacemit.com>
+Date: Fri, 17 Jul 2026 00:26:02 -0700
+Subject: [RUYI PATCH] FROMLIST: clk: spacemit: k3: fix i2s clock topology
+
+The K3 i2s clocks were modelled as a single path behind one MPMU
+register:
+
+    pll1_d96_25p6 / i2s_153p6_base
+      `-- i2s_sysclk_src (mux+gate, MPMU_ISCCR)
+            `-- i2s1_sysclk (DDN, MPMU_ISCCR)
+                  |-- i2s_bclk (div+gate, MPMU_ISCCR)
+                  `-- i2s2_sysclk (mux, parent 0)
+
+The hardware actually has two i2s clock control registers, ISCCR0
+(0x0040) and ISCCR1 (0x0044): ISCCR1 drives the common sysclk shared
+by i2s0/2/3/4/5 and the common bclk, whose divider always implies a
+fixed 1/2 factor in front, while ISCCR0 drives a dedicated path for
+i2s1:
+
+    pll1_d96_25p6 / i2s_153p6_base
+      |-- i2s_sysclk_src (mux+gate, MPMU_ISCCR1)
+      |     `-- i2s_sysclk (DDN, MPMU_ISCCR1)
+      |           |-- i2s_bclk_factor (fixed factor, /2)
+      |           |     `-- i2s_bclk (div+gate, MPMU_ISCCR1)
+      |           `-- i2s2_sysclk (mux, parent 0)
+      `-- i2s1_sysclk_src (mux+gate, MPMU_ISCCR0)
+            `-- i2s1_sysclk (DDN, MPMU_ISCCR0)
+
+Because of this mismatch, i2s_bclk reported twice the real rate, and
+the dedicated i2s1 clock path could not be described in DT at all.
+
+Model the tree as above: split the MPMU_ISCCR register macro into
+MPMU_ISCCR0 and MPMU_ISCCR1 to match the hardware register names,
+rename the common DDN to i2s_sysclk, insert the fixed 1/2 factor
+i2s_bclk_factor in front of i2s_bclk, and add the i2s1_sysclk_src mux
+and i2s1_sysclk DDN backed by MPMU_ISCCR0. CLK_MPMU_I2S1_SYSCLK now
+refers to the dedicated i2s1 clock; no in-tree user references this
+ID, so nothing is affected by the change of meaning.
+
+Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
+Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
+Link: https://lore.kernel.org/r/20260717-k3-clk-fix-i2s-v1-2-e95001a692ee@linux.spacemit.com
+Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
+---
+ drivers/clk/spacemit/ccu-k3.c    | 21 ++++++++++++++++-----
+ include/soc/spacemit/k3-syscon.h |  3 ++-
+ 2 files changed, 18 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/clk/spacemit/ccu-k3.c b/drivers/clk/spacemit/ccu-k3.c
+index 5d0e31f07d6d..5cb14349358a 100644
+--- a/drivers/clk/spacemit/ccu-k3.c
++++ b/drivers/clk/spacemit/ccu-k3.c
+@@ -218,11 +218,19 @@ static const struct clk_parent_data i2s_sysclk_src_parents[] = {
+ 	CCU_PARENT_HW(pll1_d96_25p6),
+ 	CCU_PARENT_HW(i2s_153p6_base),
+ };
+-CCU_MUX_GATE_DEFINE(i2s_sysclk_src, i2s_sysclk_src_parents, MPMU_ISCCR, 30, 1, BIT(31), 0);
++CCU_MUX_GATE_DEFINE(i2s_sysclk_src, i2s_sysclk_src_parents, MPMU_ISCCR1, 30, 1, BIT(31), 0);
+
+-CCU_DDN_DEFINE(i2s1_sysclk, i2s_sysclk_src, MPMU_ISCCR, 0, 15, 15, 12, 1, 0);
++CCU_DDN_DEFINE(i2s_sysclk, i2s_sysclk_src, MPMU_ISCCR1, 0, 15, 15, 12, 1, 0);
+
+-CCU_DIV_GATE_DEFINE(i2s_bclk, CCU_PARENT_HW(i2s1_sysclk), MPMU_ISCCR, 27, 2, BIT(29), 0);
++CCU_FACTOR_DEFINE(i2s_bclk_factor, CCU_PARENT_HW(i2s_sysclk), 2, 1);
++/*
++ * Divider of i2s_bclk always implies a 1/2 factor, which is
++ * described by i2s_bclk_factor.
++ */
++CCU_DIV_GATE_DEFINE(i2s_bclk, CCU_PARENT_HW(i2s_bclk_factor), MPMU_ISCCR1, 27, 2, BIT(29), 0);
++
++CCU_MUX_GATE_DEFINE(i2s1_sysclk_src, i2s_sysclk_src_parents, MPMU_ISCCR0, 30, 1, BIT(31), 0);
++CCU_DDN_DEFINE(i2s1_sysclk, i2s1_sysclk_src, MPMU_ISCCR0, 0, 15, 15, 12, 1, 0);
+
+ static const struct clk_parent_data i2s_sysclk_parents[] = {
+ 	CCU_PARENT_HW(pll1_d4_614p4),
+@@ -243,7 +251,7 @@ CCU_DDN_DEFINE(i2s4_sysclk_div, i2s4_sysclk_sel, MPMU_I2S4_SYSCLK, 0, 16, 16, 16
+ CCU_DDN_DEFINE(i2s5_sysclk_div, i2s5_sysclk_sel, MPMU_I2S5_SYSCLK, 0, 16, 16, 16, 1, 0);
+
+ static const struct clk_parent_data i2s2_sysclk_parents[] = {
+-	CCU_PARENT_HW(i2s1_sysclk),
++	CCU_PARENT_HW(i2s_sysclk),
+ 	CCU_PARENT_HW(i2s2_sysclk_div),
+ };
+ CCU_GATE_DEFINE(i2s0_sysclk, CCU_PARENT_HW(i2s0_sysclk_div), MPMU_I2S_SYSCLK_CTRL, BIT(2), 0);
+@@ -1162,8 +1170,11 @@ static struct clk_hw *k3_ccu_mpmu_hws[] = {
+ 	[CLK_MPMU_I2S_153P6]		= &i2s_153p6.common.hw,
+ 	[CLK_MPMU_I2S_153P6_BASE]	= &i2s_153p6_base.common.hw,
+ 	[CLK_MPMU_I2S_SYSCLK_SRC]	= &i2s_sysclk_src.common.hw,
+-	[CLK_MPMU_I2S1_SYSCLK]		= &i2s1_sysclk.common.hw,
++	[CLK_MPMU_I2S_SYSCLK]		= &i2s_sysclk.common.hw,
++	[CLK_MPMU_I2S_BCLK_FACTOR]	= &i2s_bclk_factor.common.hw,
+ 	[CLK_MPMU_I2S_BCLK]		= &i2s_bclk.common.hw,
++	[CLK_MPMU_I2S1_SYSCLK_SRC]	= &i2s1_sysclk_src.common.hw,
++	[CLK_MPMU_I2S1_SYSCLK]		= &i2s1_sysclk.common.hw,
+ 	[CLK_MPMU_I2S0_SYSCLK_SEL]	= &i2s0_sysclk_sel.common.hw,
+ 	[CLK_MPMU_I2S2_SYSCLK_SEL]	= &i2s2_sysclk_sel.common.hw,
+ 	[CLK_MPMU_I2S3_SYSCLK_SEL]	= &i2s3_sysclk_sel.common.hw,
+diff --git a/include/soc/spacemit/k3-syscon.h b/include/soc/spacemit/k3-syscon.h
+index a68255dd641f..959d8d0786fe 100644
+--- a/include/soc/spacemit/k3-syscon.h
++++ b/include/soc/spacemit/k3-syscon.h
+@@ -45,7 +45,8 @@
+ #define POSR_PLL7_LOCK			BIT(30)
+ #define POSR_PLL8_LOCK			BIT(31)
+ #define MPMU_SUCCR			0x0014
+-#define MPMU_ISCCR			0x0044
++#define MPMU_ISCCR0			0x0040
++#define MPMU_ISCCR1			0x0044
+ #define MPMU_WDTPCR			0x0200
+ #define MPMU_RIPCCR			0x0210
+ #define MPMU_ACGR			0x1024
+-- 
+2.53.0
+

SPECS/linux/0225-FROMLIST-clk-spacemit-k3-fix-missing-2-factor-in-i2s.patch

@@ -0,0 +1,46 @@
+From f61d332adfa09de5f0135735d32ed23756caaf7d Mon Sep 17 00:00:00 2001
+From: Troy Mitchell <troy.mitchell@linux.spacemit.com>
+Date: Fri, 17 Jul 2026 00:26:03 -0700
+Subject: [RUYI PATCH] FROMLIST: clk: spacemit: k3: fix missing /2 factor in
+ i2s sysclk dividers
+
+The i2s{0,2,3,4,5}_sysclk_div DDNs have an additional fixed 1/2
+divider in the hardware IP after the configurable divider, so the
+real output rate is:
+
+    rate = parent_rate * num / (den * 2)
+
+Set pre_div to 2 to account for it.
+
+Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
+Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
+Link: https://lore.kernel.org/r/20260717-k3-clk-fix-i2s-v1-3-e95001a692ee@linux.spacemit.com
+Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
+---
+ drivers/clk/spacemit/ccu-k3.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/clk/spacemit/ccu-k3.c b/drivers/clk/spacemit/ccu-k3.c
+index 5cb14349358a..972499084d3a 100644
+--- a/drivers/clk/spacemit/ccu-k3.c
++++ b/drivers/clk/spacemit/ccu-k3.c
+@@ -244,11 +244,11 @@ CCU_MUX_DEFINE(i2s3_sysclk_sel, i2s_sysclk_parents, MPMU_I2S_SYSCLK_CTRL, 12, 2,
+ CCU_MUX_DEFINE(i2s4_sysclk_sel, i2s_sysclk_parents, MPMU_I2S_SYSCLK_CTRL, 16, 2, 0);
+ CCU_MUX_DEFINE(i2s5_sysclk_sel, i2s_sysclk_parents, MPMU_I2S_SYSCLK_CTRL, 20, 2, 0);
+
+-CCU_DDN_DEFINE(i2s0_sysclk_div, i2s0_sysclk_sel, MPMU_I2S0_SYSCLK, 0, 16, 16, 16, 1, 0);
+-CCU_DDN_DEFINE(i2s2_sysclk_div, i2s2_sysclk_sel, MPMU_I2S2_SYSCLK, 0, 16, 16, 16, 1, 0);
+-CCU_DDN_DEFINE(i2s3_sysclk_div, i2s3_sysclk_sel, MPMU_I2S3_SYSCLK, 0, 16, 16, 16, 1, 0);
+-CCU_DDN_DEFINE(i2s4_sysclk_div, i2s4_sysclk_sel, MPMU_I2S4_SYSCLK, 0, 16, 16, 16, 1, 0);
+-CCU_DDN_DEFINE(i2s5_sysclk_div, i2s5_sysclk_sel, MPMU_I2S5_SYSCLK, 0, 16, 16, 16, 1, 0);
++CCU_DDN_DEFINE(i2s0_sysclk_div, i2s0_sysclk_sel, MPMU_I2S0_SYSCLK, 0, 16, 16, 16, 2, 0);
++CCU_DDN_DEFINE(i2s2_sysclk_div, i2s2_sysclk_sel, MPMU_I2S2_SYSCLK, 0, 16, 16, 16, 2, 0);
++CCU_DDN_DEFINE(i2s3_sysclk_div, i2s3_sysclk_sel, MPMU_I2S3_SYSCLK, 0, 16, 16, 16, 2, 0);
++CCU_DDN_DEFINE(i2s4_sysclk_div, i2s4_sysclk_sel, MPMU_I2S4_SYSCLK, 0, 16, 16, 16, 2, 0);
++CCU_DDN_DEFINE(i2s5_sysclk_div, i2s5_sysclk_sel, MPMU_I2S5_SYSCLK, 0, 16, 16, 16, 2, 0);
+
+ static const struct clk_parent_data i2s2_sysclk_parents[] = {
+ 	CCU_PARENT_HW(i2s_sysclk),
+-- 
+2.53.0
+

SPECS/linux/0226-FROMLIST-riscv-defconfig-enable-RFKILL-and-RFKILL_GP.patch

@@ -0,0 +1,32 @@
+From 8557c54a7e4f9eb25e3ada86c4c88e495ad31ac2 Mon Sep 17 00:00:00 2001
+From: Aurelien Jarno <aurelien@aurel32.net>
+Date: Thu, 16 Jul 2026 23:19:01 +0200
+Subject: [RUYI PATCH] FROMLIST: riscv: defconfig: enable RFKILL and
+ RFKILL_GPIO
+
+The SpacemiT K3 Pico-ITX requires RFKILL_GPIO to enable Bluetooth and
+WLAN.
+
+Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
+Link: https://lore.kernel.org/r/20260716213314.3027969-2-aurelien@aurel32.net
+Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
+---
+ arch/riscv/configs/defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
+index 9fdc4d1831ed..c3beed5ceae7 100644
+--- a/arch/riscv/configs/defconfig
++++ b/arch/riscv/configs/defconfig
+@@ -99,6 +99,8 @@ CONFIG_NET_CLS_CGROUP=m
+ CONFIG_NETLINK_DIAG=y
+ CONFIG_CGROUP_NET_PRIO=y
+ CONFIG_CAN=m
++CONFIG_RFKILL=m
++CONFIG_RFKILL_GPIO=m
+ CONFIG_NET_9P=y
+ CONFIG_NET_9P_VIRTIO=y
+ CONFIG_PCI=y
+-- 
+2.53.0
+

SPECS/linux/0227-FROMLIST-riscv-dts-spacemit-k3-add-rfkill-node-for-B.patch

@@ -0,0 +1,40 @@
+From 69ea6d4a407286fa41b54cc1a541a7a02f4a3f44 Mon Sep 17 00:00:00 2001
+From: Aurelien Jarno <aurelien@aurel32.net>
+Date: Thu, 16 Jul 2026 23:19:02 +0200
+Subject: [RUYI PATCH] FROMLIST: riscv: dts: spacemit: k3: add rfkill node for
+ Bluetooth on Pico-ITX board
+
+On the K3 PICO-ITX board, by default the GPIO pin that connects to the
+RTL8852BE Bluetooth enable signal is driven low, resulting in
+impossibility to use Bluetooth. Add a DT node to expose it as an RFKILL
+device, which lets the Bluetooth driver or userspace toggle it as
+required.
+
+Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
+Link: https://lore.kernel.org/r/20260716213314.3027969-3-aurelien@aurel32.net
+Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
+---
+ arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+index 7327eb65593c..df6b6201ecc2 100644
+--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
++++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+@@ -43,6 +43,13 @@ reg_aux_vcc5v: regulator-aux-vcc5v {
+ 		regulator-max-microvolt = <5000000>;
+ 		regulator-always-on;
+ 	};
++
++	rfkill-usb-bt {
++		compatible = "rfkill-gpio";
++		label = "rfkill-usb-bt";
++		radio-type = "bluetooth";
++		shutdown-gpios = <&gpio 0 30 GPIO_ACTIVE_HIGH>;
++	};
+ };
+
+ &i2c2 {
+-- 
+2.53.0
+