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Merged
oddball merged 3 commits into from
Aug 6, 2025
Merged

Thomas vreys min max field func #62

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aedeea7
Support for `writeValueConstraint` `minimum` and `maximum` in registe…
Thomas-Vreys Jul 31, 2025
1864f98
Changed example output files using the minimum and maximum field cons…
Thomas-Vreys Jul 31, 2025
b442512
Merge branch 'MinMax-Field-Func' of github.com:Thomas-Vreys/ipxact2sy…
oddball Aug 6, 2025
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8 changes: 8 additions & 0 deletions example/input/test.xml
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Expand Up @@ -30,6 +30,10 @@
<spirit:description>write something useful for field0</spirit:description>
<spirit:bitOffset>0</spirit:bitOffset>
<spirit:bitWidth>8</spirit:bitWidth>
<spirit:writeValueConstraint>
<spirit:minimum>0</spirit:minimum>
<spirit:maximum>7</spirit:maximum>
</spirit:writeValueConstraint>
</spirit:field>
<spirit:field>
<spirit:name>byte1</spirit:name>
Expand Down Expand Up @@ -63,6 +67,10 @@
<spirit:description>write something useful for field0</spirit:description>
<spirit:bitOffset>0</spirit:bitOffset>
<spirit:bitWidth>32</spirit:bitWidth>
<spirit:writeValueConstraint>
<spirit:minimum>4</spirit:minimum>
<spirit:maximum>20</spirit:maximum>
</spirit:writeValueConstraint>
</spirit:field>
</spirit:register>
<spirit:register>
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4 changes: 4 additions & 0 deletions example/input/test2.xml
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Expand Up @@ -43,6 +43,10 @@
<spirit:description>read something useful for field0</spirit:description>
<spirit:bitOffset>0</spirit:bitOffset>
<spirit:bitWidth>8</spirit:bitWidth>
<spirit:writeValueConstraint>
<spirit:minimum>0</spirit:minimum>
<spirit:maximum>7</spirit:maximum>
</spirit:writeValueConstraint>
</spirit:field>
</spirit:register>
</spirit:addressBlock>
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4 changes: 4 additions & 0 deletions example/output/example.h
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Expand Up @@ -38,6 +38,8 @@
// ------------------------------------------------
#define EXAMPLE_REG0_BYTE0_SHIFT 0
#define EXAMPLE_REG0_BYTE0_MASK 0xFF
#define EXAMPLE_REG0_BYTE0_MIN 0x00
#define EXAMPLE_REG0_BYTE0_MAX 0x07

#define EXAMPLE_REG0_BYTE1_SHIFT 8
#define EXAMPLE_REG0_BYTE1_MASK 0xFF
Expand All @@ -53,6 +55,8 @@
// ------------------------------------------------
#define EXAMPLE_REG1_FIELD0_SHIFT 0
#define EXAMPLE_REG1_FIELD0_MASK 0xFFFFFFFF
#define EXAMPLE_REG1_FIELD0_MIN 0x00000004
#define EXAMPLE_REG1_FIELD0_MAX 0x00000014

// ------------------------------------------------
// Bit operations for register reg2
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22 changes: 22 additions & 0 deletions example/output/example.html
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Expand Up @@ -308,6 +308,17 @@ <h1 id="reg0">reg0</h1>
</tr>
</tbody>
</table>
<h2 id="byte0">byte0</h2>
<dl>
<dt>Minimum</dt>
<dd>
0x00
</dd>
<dt>Maximum</dt>
<dd>
0x07
</dd>
</dl>
<h1 id="reg1">reg1</h1>
<dl>
<dt>Name</dt>
Expand Down Expand Up @@ -355,6 +366,17 @@ <h1 id="reg1">reg1</h1>
</tr>
</tbody>
</table>
<h2 id="field0">field0</h2>
<dl>
<dt>Minimum</dt>
<dd>
0x00000004
</dd>
<dt>Maximum</dt>
<dd>
0x00000014
</dd>
</dl>
<h1 id="reg2">reg2</h1>
<dl>
<dt>Name</dt>
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10 changes: 10 additions & 0 deletions example/output/example.md
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Expand Up @@ -35,6 +35,11 @@ Base Address: 0x0
|[15:8]|byte1|0x00|write something useful for field1|
|[7:0]|byte0|0x00|write something useful for field0|

#### byte0

**Minimum** 0x00
**Maximum** 0x07

### reg1

**Name** reg1
Expand All @@ -46,6 +51,11 @@ Base Address: 0x0
| :--- | :--- | :--- | :--- |
|[31:0]|field0|0x00000001|write something useful for field0|

#### field0

**Minimum** 0x00000004
**Maximum** 0x00000014

### reg2

**Name** reg2
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12 changes: 12 additions & 0 deletions example/output/example.rst
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Expand Up @@ -52,6 +52,12 @@ reg0
| [7:0] | byte0 | 0x00 | write something useful for field0 |
+---------+--------------+---------+-----------------------------------+

byte0
~~~~~

:Minimum: 0x00
:Maximum: 0x07

reg1
----

Expand All @@ -67,6 +73,12 @@ reg1
| [31:0] | field0 | 0x00000001 | write something useful for field0 |
+--------+--------------+------------+-----------------------------------+

field0
~~~~~~

:Minimum: 0x00000004
:Maximum: 0x00000014

reg2
----

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10 changes: 10 additions & 0 deletions example/output/example.rtf
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Expand Up @@ -252,6 +252,11 @@ reg8
}
\intbl\row}
{\pard \ql \f0 \sa180 \li0 \fi0 \par}
{\pard \ql \f0 \sa180 \li0 \fi0 \outlinelevel1 \b \fs32 byte0\par}
{\pard \ql \f0 \sa0 \li0 \fi0 Minimum\par}
{\pard \ql \f0 \sa0 \li360 \fi0 0x00\par}
{\pard \ql \f0 \sa0 \li0 \fi0 Maximum\par}
{\pard \ql \f0 \sa0 \li360 \fi0 0x07\sa180\par}
{\pard \ql \f0 \sa180 \li0 \fi0 \outlinelevel0 \b \fs36 reg1\par}
{\pard \ql \f0 \sa0 \li0 \fi0 Name\par}
{\pard \ql \f0 \sa0 \li360 \fi0 reg1\par}
Expand Down Expand Up @@ -293,6 +298,11 @@ reg8
}
\intbl\row}
{\pard \ql \f0 \sa180 \li0 \fi0 \par}
{\pard \ql \f0 \sa180 \li0 \fi0 \outlinelevel1 \b \fs32 field0\par}
{\pard \ql \f0 \sa0 \li0 \fi0 Minimum\par}
{\pard \ql \f0 \sa0 \li360 \fi0 0x00000004\par}
{\pard \ql \f0 \sa0 \li0 \fi0 Maximum\par}
{\pard \ql \f0 \sa0 \li360 \fi0 0x00000014\sa180\par}
{\pard \ql \f0 \sa180 \li0 \fi0 \outlinelevel0 \b \fs36 reg2\par}
{\pard \ql \f0 \sa0 \li0 \fi0 Name\par}
{\pard \ql \f0 \sa0 \li360 \fi0 reg2\par}
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2 changes: 2 additions & 0 deletions example/output/example2.h
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Expand Up @@ -40,6 +40,8 @@
// ------------------------------------------------
#define EXAMPLE2_REG1_FIELD0_SHIFT 0
#define EXAMPLE2_REG1_FIELD0_MASK 0xFF
#define EXAMPLE2_REG1_FIELD0_MIN 0x00
#define EXAMPLE2_REG1_FIELD0_MAX 0x07


// ------------------------------------------------
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5 changes: 5 additions & 0 deletions example/output/example2.md
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Expand Up @@ -34,3 +34,8 @@ Base Address: 0x0
|Bits|Field name|Description|
| :--- | :--- | :--- |
|[7:0]|field0|read something useful for field0|

#### field0

**Minimum** 0x00
**Maximum** 0x07
6 changes: 6 additions & 0 deletions example/output/example2.rst
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Expand Up @@ -48,3 +48,9 @@ reg1
| [7:0] | field0 | read something useful for field0 |
+--------+--------------+----------------------------------+

field0
~~~~~~

:Minimum: 0x00
:Maximum: 0x07

2 changes: 1 addition & 1 deletion example/output/example2_sv_pkg.sv
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Expand Up @@ -35,7 +35,7 @@ typedef struct packed {


typedef struct packed {
bit [7:0] field0;//bits [7:0]
bit [7:0] field0;//bits [7:0], Min: 0x00, Max: 0x07
} reg1_struct_type;


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2 changes: 1 addition & 1 deletion example/output/example2_vhd_pkg.vhd
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Expand Up @@ -29,7 +29,7 @@ package example2_vhd_pkg is
end record;

type reg1_record_type is record
field0 : std_ulogic_vector(7 downto 0); -- [7:0]
field0 : std_ulogic_vector(7 downto 0); -- [7:0], Min: 0x00, Max: 0x07
end record;

type example2_in_record_type is record
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4 changes: 2 additions & 2 deletions example/output/example_sv_pkg.sv
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Expand Up @@ -60,12 +60,12 @@ typedef struct packed {
bit [7:0] byte3;//bits [31:24]
bit [7:0] byte2;//bits [23:16]
bit [7:0] byte1;//bits [15:8]
bit [7:0] byte0;//bits [7:0]
bit [7:0] byte0;//bits [7:0], Min: 0x00, Max: 0x07
} reg0_struct_type;


typedef struct packed {
bit [31:0] field0;//bits [31:0]
bit [31:0] field0;//bits [31:0], Min: 0x00000004, Max: 0x00000014
} reg1_struct_type;


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4 changes: 2 additions & 2 deletions example/output/example_vhd_pkg.vhd
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Expand Up @@ -69,11 +69,11 @@ package example_vhd_pkg is
byte3 : std_ulogic_vector(7 downto 0); -- [31:24]
byte2 : std_ulogic_vector(7 downto 0); -- [23:16]
byte1 : std_ulogic_vector(7 downto 0); -- [15:8]
byte0 : std_ulogic_vector(7 downto 0); -- [7:0]
byte0 : std_ulogic_vector(7 downto 0); -- [7:0], Min: 0x00, Max: 0x07
end record;

type reg1_record_type is record
field0 : std_ulogic_vector(31 downto 0); -- [31:0]
field0 : std_ulogic_vector(31 downto 0); -- [31:0], Min: 0x00000004, Max: 0x00000014
end record;

type reg2_record_type is record
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4 changes: 4 additions & 0 deletions example/output_default/example.h
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Expand Up @@ -38,6 +38,8 @@
// ------------------------------------------------
#define EXAMPLE_REG0_BYTE0_SHIFT 0
#define EXAMPLE_REG0_BYTE0_MASK 0xFF
#define EXAMPLE_REG0_BYTE0_MIN 0x00
#define EXAMPLE_REG0_BYTE0_MAX 0x07

#define EXAMPLE_REG0_BYTE1_SHIFT 8
#define EXAMPLE_REG0_BYTE1_MASK 0xFF
Expand All @@ -53,6 +55,8 @@
// ------------------------------------------------
#define EXAMPLE_REG1_FIELD0_SHIFT 0
#define EXAMPLE_REG1_FIELD0_MASK 0xFFFFFFFF
#define EXAMPLE_REG1_FIELD0_MIN 0x00000004
#define EXAMPLE_REG1_FIELD0_MAX 0x00000014

// ------------------------------------------------
// Bit operations for register reg2
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10 changes: 10 additions & 0 deletions example/output_default/example.md
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Expand Up @@ -35,6 +35,11 @@ Base Address: 0x0
|[15:8]|byte1|0x00|write something useful for field1|
|[7:0]|byte0|0x00|write something useful for field0|

#### byte0

**Minimum** 0x00
**Maximum** 0x07

### reg1

**Name** reg1
Expand All @@ -46,6 +51,11 @@ Base Address: 0x0
| :--- | :--- | :--- | :--- |
|[31:0]|field0|0x00000001|write something useful for field0|

#### field0

**Minimum** 0x00000004
**Maximum** 0x00000014

### reg2

**Name** reg2
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12 changes: 12 additions & 0 deletions example/output_default/example.rst
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Expand Up @@ -52,6 +52,12 @@ reg0
| [7:0] | byte0 | 0x00 | write something useful for field0 |
+---------+--------------+---------+-----------------------------------+

byte0
~~~~~

:Minimum: 0x00
:Maximum: 0x07

reg1
----

Expand All @@ -67,6 +73,12 @@ reg1
| [31:0] | field0 | 0x00000001 | write something useful for field0 |
+--------+--------------+------------+-----------------------------------+

field0
~~~~~~

:Minimum: 0x00000004
:Maximum: 0x00000014

reg2
----

Expand Down
4 changes: 2 additions & 2 deletions example/output_default/example_sv_pkg.sv
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Expand Up @@ -60,12 +60,12 @@ typedef struct packed {
bit [7:0] byte3;//bits [31:24]
bit [7:0] byte2;//bits [23:16]
bit [7:0] byte1;//bits [15:8]
bit [7:0] byte0;//bits [7:0]
bit [7:0] byte0;//bits [7:0], Min: 0x00, Max: 0x07
} reg0_struct_type;


typedef struct packed {
bit [31:0] field0;//bits [31:0]
bit [31:0] field0;//bits [31:0], Min: 0x00000004, Max: 0x00000014
} reg1_struct_type;


Expand Down
4 changes: 2 additions & 2 deletions example/output_default/example_vhd_pkg.vhd
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Expand Up @@ -69,11 +69,11 @@ package example_vhd_pkg is
byte3 : std_ulogic_vector(7 downto 0); -- [31:24]
byte2 : std_ulogic_vector(7 downto 0); -- [23:16]
byte1 : std_ulogic_vector(7 downto 0); -- [15:8]
byte0 : std_ulogic_vector(7 downto 0); -- [7:0]
byte0 : std_ulogic_vector(7 downto 0); -- [7:0], Min: 0x00, Max: 0x07
end record;

type reg1_record_type is record
field0 : std_ulogic_vector(31 downto 0); -- [31:0]
field0 : std_ulogic_vector(31 downto 0); -- [31:0], Min: 0x00000004, Max: 0x00000014
end record;

type reg2_record_type is record
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4 changes: 4 additions & 0 deletions example/output_no_default/example.h
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Expand Up @@ -38,6 +38,8 @@
// ------------------------------------------------
#define EXAMPLE_REG0_BYTE0_SHIFT 0
#define EXAMPLE_REG0_BYTE0_MASK 0xFF
#define EXAMPLE_REG0_BYTE0_MIN 0x00
#define EXAMPLE_REG0_BYTE0_MAX 0x07

#define EXAMPLE_REG0_BYTE1_SHIFT 8
#define EXAMPLE_REG0_BYTE1_MASK 0xFF
Expand All @@ -53,6 +55,8 @@
// ------------------------------------------------
#define EXAMPLE_REG1_FIELD0_SHIFT 0
#define EXAMPLE_REG1_FIELD0_MASK 0xFFFFFFFF
#define EXAMPLE_REG1_FIELD0_MIN 0x00000004
#define EXAMPLE_REG1_FIELD0_MAX 0x00000014

// ------------------------------------------------
// Bit operations for register reg2
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10 changes: 10 additions & 0 deletions example/output_no_default/example.md
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Expand Up @@ -35,6 +35,11 @@ Base Address: 0x0
|[15:8]|byte1|0x00|write something useful for field1|
|[7:0]|byte0|0x00|write something useful for field0|

#### byte0

**Minimum** 0x00
**Maximum** 0x07

### reg1

**Name** reg1
Expand All @@ -46,6 +51,11 @@ Base Address: 0x0
| :--- | :--- | :--- | :--- |
|[31:0]|field0|0x00000001|write something useful for field0|

#### field0

**Minimum** 0x00000004
**Maximum** 0x00000014

### reg2

**Name** reg2
Expand Down
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