gate(ROCM): M4 -- pinned vLLM-ROCm oracle on gfx1100 + ROCm device-golden lane in the Qwen3-0.6B near-tie gate - #549
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…lden lane in the Qwen3-0.6B near-tie gate Issue mudler#41 M4 milestone. The oracle is upstream vLLM AT THE PIN (555967922, runtime 0.23.1rc1.dev1511+g555967922 -- verified == the parity-pin block) built from source as a ROCm wheel for gfx1100 in rocm/vllm-dev:base and committed as the image vllm-rocm-oracle:555967922-gfx1100 (recipe: .agents/specs/rocm-m4-oracle.md). Gate result on this box (4x RX 7900 XTX, ROCm 7.14, enforce_eager, batch=1, flock ~/gpu.lock): oracle K=10 per-prompt greedy deterministic in every cell; our ROCm engine 16/16 prompts PASS -- 11/16 strict token-exact vs base greedy, 5/16 near-tie band, max teacher-forced gap 0.125 nats, 0 forward-divergent, 125/125 assertions, backend proof all 8 Qwen3-dense ops selections>0 and declines==0 on device 5. The p0 France/Italy flip is a literal 0.0000-nat tie in the oracle's own logits (the Metal M3b signature, reproduced on ROCm). Change shape: the parity gate's Metal/Tenstorrent device-golden lane gains the kROCM arm (identical anchor+band logic, ROCm's own oracle-backed golden pair); dgx base goldens byte-untouched; the *_rocm goldens are additive. FOLLOWING_AGENTS_PROTOCOL Following-Agents-Protocol: true AI-Assisted: true Assisted-by: pi:kimi-k3 [pi]
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M4 on gfx1100 — the pinned vLLM-ROCm oracle + the ROCm near-tie gate lane (issue #41)
This PR lands the M4 milestone for
BACKEND-ROCM: a pinned vLLM-ROCm oracle built on the same box (the maintainer's assignment — this is the only board that can host one) and the ROCm arm of the existing device-golden lane in the Qwen3-0.6B near-tie gate.The oracle
555967922, runtime identity0.23.1rc1.dev1511+g555967922(verified ==.agents/upstream-sync.mdparity-pin block)rocm/vllm-dev:base(2,696 files;_C/_rocm_C/_moe_CABI extensions present)vllm-rocm-oracle:555967922-gfx1100; full recipe in.agents/specs/rocm-m4-oracle.mdThe gate result (Qwen3-0.6B, 4x RX 7900 XTX, ROCm 7.14)
All 28 token-divergent positions vs the oracle's own greedy are inside the 0.5-nat band. The known p0 France/Italy flip is a literal 0.0000-nat tie in the oracle's own logits — the Metal M3b signature, reproduced on ROCm: vLLM's teacher-forced argmax on our exact prefix IS
15344 (" Italy").Change shape (additive only)
tests/parity/test_qwen3_paged_engine.cpp: the existing Metal/Tenstorrent device-golden branch gains thekROCMarm — identical anchor + near-tie-band logic, ROCm's own oracle-backed golden pair; CUDA/CPU/Metal/TT behaviour byte-unchangedour_ids_rocm.npy,neartie_gap_mnats_rocm.npy(the lane pair) +greedy_ids_rocm.npy/greedy_dist_rocm.npy(oracle capture evidence). dgx base goldens untouched.agents/specs/rocm-m4-oracle.md: the reproducible recipeCLAIM-ROCM-M4, parity-ledger row, STATUS.md, NOW.mdNext (not in this PR)
Qwen3.5-0.8B (GDN) and the 35B keep-quant gates under the same oracle; Qwen3-4B strict deterministic gate needs disk.