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feat(comm): add selected-record PCIe exchange#64

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feat(comm): add selected-record PCIe exchange#64
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FujitsuPolycom:codex/upstream-selected-record-direct-20260721

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@FujitsuPolycom FujitsuPolycom commented Jul 21, 2026

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Summary

Add a record-format-agnostic selected-record PCIe exchange for CUDA-IPC peers.

The caller supplies fixed-width CUDA byte records and a finalized per-destination owner map. An SM kernel writes each owned record into the destination IPC slab at its final selected position, with bounded device barriers for visibility and safe slab reuse.

This transport does not compute top-K, ownership, unions, or remaps.

Contract

  • contiguous CUDA uint8 records and output
  • contiguous int32 or int64 destination map
  • exactly one source owner per destination position
  • rank-identical exchange order and active count
  • one stream-affine channel per CUDA stream
  • eager bind before graph capture
  • explicit close before process-group teardown
  • initialization fails rank-consistently if IPC/P2P is unavailable

The process group is used for setup/handshakes; payload data uses CUDA IPC peer stores, not NCCL.

Validation

Focused tests cover:

  • DCP2 and optional DCP4
  • 16, 37, 368, and 432-byte records
  • eager and CUDA graph replay
  • changing records/maps without replay allocation
  • empty, partial, and full capacity
  • offsets above 2 GiB
  • stream affinity, lifecycle, and rank-consistent failures

The paired public integration reported 57 Sparkinfer tests passed and 4 GPU-only tests skipped in CI. The native 368-byte direct transport also passed the four-GPU eager/graph byte-equivalence gate and the FP8-RoPE model integration.

Design

GLM-5.2 Sparse CKV under Decode Context Parallelism

The transport is generic. The paired vLLM integration now enables native 368-byte NVFP4 + FP8-RoPE and 432-byte NVFP4 + BF16-RoPE records.

Credits

The selected-record design builds on Koush's sparse-CKV work and Luke Alonso's B12X/Sparkinfer infrastructure.

Implementation, tests, and documentation were developed with OpenAI Codex assistance and manually reviewed and GPU-validated.

Summary by CodeRabbit

  • New Features
    • Added a PCIe “selected-record” exchange API for direct scatter of destination-selected, fixed-width records.
    • Publicly exposed SelectedRecordExchange and SelectedRecordExchangeInitializationError, and expanded supported dtypes to include uint8.
  • Bug Fixes
    • Adjusted packaging to ensure the CUDA extension sources for the PCIe submodule are included.
  • Tests
    • Added extensive CPU and GPU validation, including distributed setup/handshakes, error handling, CUDA graph execution, and cleanup/idempotency checks.

Add a direct CUDA-IPC exchange for destination-selected fixed-width records, expose it through the Sparkinfer PCIe facade, and preserve runtime-JIT CUDA sources in built wheels.

Co-authored-by: OpenAI Codex <codex@openai.com>

Signed-off-by: FujitsuPolycom <87842395+FujitsuPolycom@users.noreply.github.com>
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Review Change Stack

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info
⚙️ Run configuration

Configuration used: Organization UI

Review profile: CHILL

Plan: Pro Plus

Run ID: 216a8a1c-6eb0-4b27-9641-2610ad02bb24

📥 Commits

Reviewing files that changed from the base of the PR and between 0bf4e34 and c70e98b.

📒 Files selected for processing (2)
  • sparkinfer/comm/pcie/pcie_selected_records.cu
  • tests/comm/test_pcie_selected_records.py
🚧 Files skipped from review as they are similar to previous changes (2)
  • sparkinfer/comm/pcie/pcie_selected_records.cu
  • tests/comm/test_pcie_selected_records.py

📝 Walkthrough

Walkthrough

Adds a CUDA-backed PCIe selected-record exchange with distributed configuration validation, CUDA IPC shared buffers, peer scatter/barrier kernels, public API exports, packaging updates, and CPU/GPU test coverage.

Changes

Selected-record exchange

Layer / File(s) Summary
Package and public API surface
pyproject.toml, sparkinfer/comm/pcie/*
Packages the CUDA source and exports the selected-record exchange API and initialization error.
Layout, handshake, and shared-buffer initialization
sparkinfer/comm/pcie/pcie_selected_records.py
Computes slab layouts, validates rank configuration, exchanges IPC handles, allocates shared buffers, and wires peer pointers and counters.
CUDA scatter and barrier execution
sparkinfer/comm/pcie/pcie_selected_records.cu
Adds destination scatter, two-phase peer barriers, offset arithmetic, tensor validation, device copies, and Python bindings.
Runtime validation and resource lifecycle
sparkinfer/comm/pcie/pcie_selected_records.py, tests/comm/test_pcie_selected_records.py
Adds stream checks, input validation, extension dispatch, cleanup, and focused tests for layout, IPC, errors, capture, and lifecycle behavior.
Multi-rank eager and graph validation
tests/comm/test_pcie_selected_records_gpu.py
Tests NCCL initialization, eager exchanges, CUDA graph replay, large offsets, stable allocations, and rank-consistent failures.

Estimated code review effort: 5 (Critical) | ~120 minutes

Sequence Diagram(s)

sequenceDiagram
  participant Caller
  participant PCIeSelectedRecordExchange
  participant CUDAExtension
  participant PeerSlabs
  Caller->>PCIeSelectedRecordExchange: exchange(records, indices, out)
  PCIeSelectedRecordExchange->>PCIeSelectedRecordExchange: validate inputs and stream
  PCIeSelectedRecordExchange->>CUDAExtension: dispatch exchange
  CUDAExtension->>PeerSlabs: scatter selected records
  CUDAExtension->>PeerSlabs: synchronize peer barriers
  PeerSlabs->>Caller: fill output tensor
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🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 2.99% which is insufficient. The required threshold is 80.00%. Write docstrings for the functions missing them to satisfy the coverage threshold.
✅ Passed checks (4 passed)
Check name Status Explanation
Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The title clearly summarizes the main change: adding a selected-record PCIe exchange in the comm subsystem.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
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Signed-off-by: FujitsuPolycom <87842395+FujitsuPolycom@users.noreply.github.com>
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voipmonitor marked this pull request as ready for review July 22, 2026 09:04

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Actionable comments posted: 1

🧹 Nitpick comments (1)
tests/comm/test_pcie_selected_records.py (1)

398-432: 📐 Maintainability & Code Quality | 🔵 Trivial | ⚡ Quick win

Add a test that close() is idempotent.

This layer's description claims idempotent close behavior was added, but no test here calls close() twice to confirm double-close/double-free safety (e.g., that cudaIpcCloseMemHandle/cudaFree aren't invoked again, or _owned_buffer is cleared after first close).

✅ Suggested addition
def test_close_is_idempotent(monkeypatch):
    ...
    runtime.close()
    operations.clear()
    runtime.close()  # should be a no-op
    assert operations == []
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@tests/comm/test_pcie_selected_records.py` around lines 398 - 432, Add a test
alongside test_cleanup_rebinds_the_configured_cuda_device that invokes
runtime.close() twice, clearing the recorded operations after the first call,
and asserts the second call performs no CUDA cleanup operations. Reuse the
existing runtime, _CleanupIPC, and _OwnedSharedBuffer setup to verify close()
clears or otherwise invalidates cleanup state and prevents repeated
cudaIpcCloseMemHandle or cudaFree calls.
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Inline comments:
In `@sparkinfer/comm/pcie/pcie_selected_records.cu`:
- Around line 76-121: Add a system-scope memory fence at the end of
scatter_records_kernel, after all payload writes complete, so remote peer-slab
stores become visible before the subsequent flag exchange. Ensure the fence is
reached by every participating thread, including threads with no record work.

---

Nitpick comments:
In `@tests/comm/test_pcie_selected_records.py`:
- Around line 398-432: Add a test alongside
test_cleanup_rebinds_the_configured_cuda_device that invokes runtime.close()
twice, clearing the recorded operations after the first call, and asserts the
second call performs no CUDA cleanup operations. Reuse the existing runtime,
_CleanupIPC, and _OwnedSharedBuffer setup to verify close() clears or otherwise
invalidates cleanup state and prevents repeated cudaIpcCloseMemHandle or
cudaFree calls.
🪄 Autofix (Beta)

Fix all unresolved CodeRabbit comments on this PR:

  • Push a commit to this branch (recommended)
  • Create a new PR with the fixes

ℹ️ Review info
⚙️ Run configuration

Configuration used: Organization UI

Review profile: CHILL

Plan: Pro Plus

Run ID: 83f65be6-ab65-41f2-ae96-a2498c6f9935

📥 Commits

Reviewing files that changed from the base of the PR and between 1012199 and 0bf4e34.

📒 Files selected for processing (7)
  • pyproject.toml
  • sparkinfer/comm/pcie/__init__.py
  • sparkinfer/comm/pcie/api.py
  • sparkinfer/comm/pcie/pcie_selected_records.cu
  • sparkinfer/comm/pcie/pcie_selected_records.py
  • tests/comm/test_pcie_selected_records.py
  • tests/comm/test_pcie_selected_records_gpu.py

Comment thread sparkinfer/comm/pcie/pcie_selected_records.cu
Signed-off-by: FujitsuPolycom <87842395+FujitsuPolycom@users.noreply.github.com>
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