Alex for next cfi manual#668

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AlexGhiti wants to merge 85 commits into

alex-for-next-cfi_manual

Commits on Jul 27, 2025

riscv: Replace __ASSEMBLY__ with __ASSEMBLER__ in uapi headers

huth
authored and
Alexandre Ghiti
committed
riscv: Replace __ASSEMBLY__ with __ASSEMBLER__ in non-uapi headers

huth
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: Replace __ASSEMBLY__ with __ASSEMBLER__ in header files"
Alexandre Ghiti
committed
riscv: pi: use 'targets' instead of extra-y in Makefile

masahir0y
authored and
Alexandre Ghiti
committed

Commits on Jul 31, 2025

riscv: cpufeature: add validation for zfa, zfh and zfhmin

clementleger
authored and
Alexandre Ghiti
committed
riscv: Fix typo EXRACT -> EXTRACT
Alexandre Ghiti
committed
riscv: Strengthen duplicate and inconsistent definition of RV_X()
Alexandre Ghiti
committed
riscv: Move all duplicate insn parsing macros into asm/insn.h
Alexandre Ghiti
committed
Merge patch series "Move duplicated instructions macros into asm/insn.h"
Alexandre Ghiti
committed
riscv: kprobes: Move branch_rs2_idx to insn.h

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Move branch_funct3 to insn.h

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_JTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_RS1_REG

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_BTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kproves: Remove duplication of RVC_EXTRACT_JTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RVC_EXTRACT_C2_RS1_REG

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RVC_EXTRACT_BTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_RD_REG

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_UTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_ITYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: kprobes: Clean up instruction simulation"
Alexandre Ghiti
committed
riscv: Add kprobes KUnit test

covanam
authored and
Alexandre Ghiti
committed
riscv: mmap(): use unsigned offset type in riscv_sys_mmap

Jessica Liu
authored and
Alexandre Ghiti
committed
riscv: Move vendor errata definitions to new header

guoren83
authored and
Alexandre Ghiti
committed
riscv: errata: Add ERRATA_THEAD_WRITE_ONCE fixup

guoren83
authored and
Alexandre Ghiti
committed
raid6: riscv: Clean up unused header file inclusion

Chunyan-iscas
authored and
Alexandre Ghiti
committed
raid6: riscv: replace one load with a move to speed up the caculation

Chunyan-iscas
authored and
Alexandre Ghiti
committed
raid6: riscv: Prevent compiler with vector support to build already vectorized code

Chunyan-iscas
authored and
Alexandre Ghiti
committed
raid6: riscv: Allow code to be compiled in userspace

Chunyan-iscas
authored and
Alexandre Ghiti
committed
raid6: test: Add support for RISC-V

lyrazhang
authored and
Alexandre Ghiti
committed
riscv: mm: Return intended SATP mode for noXlvl options

pigmoral
authored and
Alexandre Ghiti
committed
riscv: mm: Use mmu-type from FDT to limit SATP mode

pigmoral
authored and
Alexandre Ghiti
committed
riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG

Pu Lehui
authored and
Alexandre Ghiti
committed
selftests: riscv: add misaligned access testing

clementleger
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: errata: Add ERRATA_THEAD_WRITE_ONCE fixup"
Alexandre Ghiti
committed
Merge patch series "Add an optimization also raid6test for RISC-V support"
Alexandre Ghiti
committed
riscv: introduce asm/swab.h

IEncinas10
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: mm: Use mmu-type from FDT as SATP mode limit"
Alexandre Ghiti
committed
riscv: uaccess: fix __put_user_nocheck for unaligned accesses

aurel32
authored and
Alexandre Ghiti
committed
riscv: use lw when reading int cpu in new_vmalloc_check

radimkrcmar
authored and
Alexandre Ghiti
committed
riscv: use lw when reading int cpu in asm_per_cpu

radimkrcmar
authored and
Alexandre Ghiti
committed
riscv: use TASK_TI_CPU instead of TASK_TI_CPU_NUM

radimkrcmar
authored and
Alexandre Ghiti
committed
riscv: pack rv64 thread_info better

radimkrcmar
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: minor thread_info.cpu improvements"
Alexandre Ghiti
committed
dt-bindings: riscv: Add xmipsexectl ISA extension description

aleksapaunovic-htec
authored and
Alexandre Ghiti
committed
riscv: Add xmipsexectl as a vendor extension

aleksapaunovic-htec
authored and
Alexandre Ghiti
committed
riscv: Add xmipsexectl instructions

aleksapaunovic-htec
authored and
Alexandre Ghiti
committed
riscv: hwprobe: Add MIPS vendor extension probing

aleksapaunovic-htec
authored and
Alexandre Ghiti
committed
riscv: hwprobe: Document MIPS xmipsexectl vendor extension

aleksapaunovic-htec
authored and
Alexandre Ghiti
committed
riscv: Add tools support for xmipsexectl

aleksapaunovic-htec
authored and
Alexandre Ghiti
committed
riscv: errata: Fix the PAUSE Opcode for MIPS P8700

djtodoro
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: Add support for xmipsexectl"
Alexandre Ghiti
committed
RISC-V: ACPI: enable parsing the BGRT table

xypron
authored and
Alexandre Ghiti
committed

Commits on Aug 1, 2025

ACPI: support BGRT table on RISC-V

xypron
authored and
Alexandre Ghiti
committed
Merge patch series "ACPI: support BGRT table on RISC-V"
Alexandre Ghiti
committed
riscv: introduce ioremap_wc()

cuiyunhui
authored and
Alexandre Ghiti
committed
mm: VM_SHADOW_STACK definition for riscv

deepak0414
authored and
Alexandre Ghiti
committed
dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml)

deepak0414
authored and
Alexandre Ghiti
committed
riscv: zicfiss / zicfilp enumeration

deepak0414
authored and
Alexandre Ghiti
committed
riscv: zicfiss / zicfilp extension csr and bit definitions

deepak0414
authored and
Alexandre Ghiti
committed
riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit

deepak0414
authored and
Alexandre Ghiti
committed
riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE

deepak0414
authored and
Alexandre Ghiti
committed
riscv/mm: manufacture shadow stack pte

deepak0414
authored and
Alexandre Ghiti
committed
riscv/mm: teach pte_mkwrite to manufacture shadow stack PTEs

deepak0414
authored and
Alexandre Ghiti
committed
riscv/mm: write protect and shadow stack

deepak0414
authored and
Alexandre Ghiti
committed
riscv/mm: Implement map_shadow_stack() syscall

deepak0414
authored and
Alexandre Ghiti
committed
riscv/shstk: If needed allocate a new shadow stack on clone

deepak0414
authored and
Alexandre Ghiti
committed
riscv: Implements arch agnostic shadow stack prctls

deepak0414
authored and
Alexandre Ghiti
committed
prctl: arch-agnostic prctl for indirect branch tracking

deepak0414
authored and
Alexandre Ghiti
committed
riscv: Implements arch agnostic indirect branch tracking prctls

deepak0414
authored and
Alexandre Ghiti
committed
riscv/traps: Introduce software check exception and uprobe handling

deepak0414
authored and
Alexandre Ghiti
committed
riscv: signal: abstract header saving for setup_sigcontext

AndybnACT
authored and
Alexandre Ghiti
committed
riscv/signal: save and restore of shadow stack for signal

deepak0414
authored and
Alexandre Ghiti
committed
riscv/kernel: update __show_regs to print shadow stack register

deepak0414
authored and
Alexandre Ghiti
committed
riscv/ptrace: riscv cfi status and state via ptrace and in core files

deepak0414
authored and
Alexandre Ghiti
committed
riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe

deepak0414
authored and
Alexandre Ghiti
committed
riscv: kernel command line option to opt out of user cfi

deepak0414
authored and
Alexandre Ghiti
committed
riscv: enable kernel access to shadow stack memory via FWFT sbi call

deepak0414
authored and
Alexandre Ghiti
committed
arch/riscv: compile vdso with landing pad and shadow stack note

cwshu
authored and
Alexandre Ghiti
committed
riscv: create a config for shadow stack and landing pad instr support

deepak0414
authored and
Alexandre Ghiti
committed
riscv: Documentation for landing pad / indirect branch tracking

deepak0414
authored and
Alexandre Ghiti
committed
riscv: Documentation for shadow stack on riscv

deepak0414
authored and
Alexandre Ghiti
committed
kselftest/riscv: kselftest for user mode cfi

deepak0414
authored and
Alexandre Ghiti
committed
Merge patch series "riscv control-flow integrity for usermode"
Alexandre Ghiti
committed
Adding CI files
Alexandre Ghiti
committed