[PW_SID:972151] [v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver#534
[PW_SID:972151] [v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver#534linux-riscv-bot wants to merge 8 commits into
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Introduce the pwrseq-thead-gpu driver, a power sequencer provider for the Imagination BXM-4-64 GPU on the T-HEAD TH1520 SoC. This driver is an auxiliary driver instantiated by the AON power domain driver. The TH1520 GPU requires a specific sequence to correctly initialize and power down its resources: - Enable GPU clocks (core and sys). - De-assert the GPU clock generator reset (clkgen_reset). - Introduce a short hardware-required delay. - De-assert the GPU core reset. The power-down sequence performs these steps in reverse. Implement this sequence via the pwrseq_power_on and pwrseq_power_off callbacks. Crucially, the driver's match function is called when a consumer (the Imagination GPU driver) requests the "gpu-power" target. During this match, the sequencer uses devm_clk_bulk_get() and devm_reset_control_get_exclusive() on the consumer's device to obtain handles to the GPU's "core" and "sys" clocks, and the GPU core reset. These, along with clkgen_reset obtained from parent aon node, allow it to perform the complete sequence. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Extend the TH1520 AON to describe the GPU clkgen reset line, required for proper GPU clock and reset sequencing. The T-HEAD TH1520 GPU requires coordinated management of two clocks (core and sys) and two resets (GPU core reset and GPU clkgen reset). Only the clkgen reset is exposed at the AON level, to support SoC specific initialization handled through a dedicated auxiliary power sequencing driver. The GPU core reset remains described in the GPU device node, as from the GPU driver's perspective, there is only a single reset line [1]. This follows upstream maintainers' recommendations [2] to abstract SoC specific details into the PM domain layer rather than exposing them to drivers directly. Link: https://lore.kernel.org/all/816db99d-7088-4c1a-af03-b9a825ac09dc@imgtec.com/ - [1] Link: https://lore.kernel.org/all/38d9650fc11a674c8b689d6bab937acf@kernel.org/ - [2] Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
In order to support the complex power sequencing required by the TH1520 GPU, the AON power domain driver must be responsible for initiating the corresponding sequencer driver. This functionality is specific to platforms where the GPU power sequencing hardware is controlled by the AON block. Extend the AON power domain driver to check for the presence of the "gpu-clkgen" reset in its own device tree node. If the property is found, create and register a new auxiliary device. This device acts as a proxy that allows the dedicated `pwrseq-thead-gpu` auxiliary driver to bind and take control of the sequencing logic. Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Update the Imagination PVR DRM driver to leverage the pwrseq framework
for managing the power sequence of the GPU on the T-HEAD TH1520 SoC.
To cleanly handle the TH1520's specific power requirements in the
generic driver, this patch implements the "driver match data" pattern. A
has_pwrseq flag in a new pvr_soc_data struct is now associated with
thead,th1520-gpu compatible string in the of_device_id table.
At probe time, the driver checks this flag. If true, it calls
devm_pwrseq_get("gpu-power"), requiring a valid sequencer and deferring
probe on failure. In this mode, all power and reset control is delegated
to the pwrseq provider. If the flag is false, the driver skips this
logic and falls back to its standard manual power management. Clock
handles are still acquired directly by this driver in both cases for
other purposes like devfreq.
The runtime PM callbacks, pvr_power_device_resume() and
pvr_power_device_suspend(), are modified to call pwrseq_power_on() and
pwrseq_power_off() respectively when the sequencer is present. A helper
function, pvr_power_off_sequence_manual(), is introduced to encapsulate
the manual power-down logic.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Update the img,powervr-rogue.yaml to include the T-HEAD TH1520 SoC's specific GPU compatible string. The thead,th1520-gpu compatible, along with its full chain img,img-bxm-4-64, and img,img-rogue, is added to the list of recognized GPU types. The power-domains property requirement for img,img-bxm-4-64 is also ensured by adding it to the relevant allOf condition. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add the "gpu-clkgen" reset property to the AON device tree node. This allows the AON power domain driver to detect the capability to power sequence the GPU and spawn the necessary pwrseq-thead-gpu auxiliary driver for managing the GPU's complex power sequence. This commit also adds the prerequisite dt-bindings/reset/thead,th1520-reset.h include to make the TH1520_RESET_ID_GPU_CLKGEN available. This include was previously dropped during a conflict resolution [1]. Link: https://lore.kernel.org/all/aAvfn2mq0Ksi8DF2@x1/ [1] Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD TH1520 SoC used by the Lichee Pi 4A board. This node enables support for the GPU using the drm/imagination driver. By adding this node, the kernel can recognize and initialize the GPU, providing graphics acceleration capabilities on the Lichee Pi 4A and other boards based on the TH1520 SoC. Add fixed clock gpu_mem_clk, as the MEM clock on the T-HEAD SoC can't be controlled programatically. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Several RISC-V boards feature Imagination GPUs that are compatible with the PowerVR driver. An example is the IMG BXM-4-64 GPU on the Lichee Pi 4A board. This commit adjusts the driver's Kconfig dependencies to allow the PowerVR driver to be compiled on the RISC-V architecture. By enabling compilation on RISC-V, we expand support for these GPUs, providing graphics acceleration capabilities and enhancing hardware compatibility on RISC-V platforms. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 1: "[v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 2: "[v4,2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen" |
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Patch 6: "[v4,6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node" |
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Patch 6: "[v4,6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node" |
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Patch 6: "[v4,6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node" |
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Patch 6: "[v4,6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 7: "[v4,7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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Patch 8: "[v4,8/8] drm/imagination: Enable PowerVR driver for RISC-V" |
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PR for series 972151 applied to workflow__riscv__fixes
Name: [v4,1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=972151
Version: 4