[PW_SID:1128156] riscv: mm: Some optimizations for tlb flush#2290
[PW_SID:1128156] riscv: mm: Some optimizations for tlb flush#2290linux-riscv-bot wants to merge 4 commits into
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Only flush TLB entries for the specified mm in update_mmu_cache_range(). Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Use Svinval in update_mmu_cache_range() when the extension is available. Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Clear corresponding bit of current cpu in mm_cpumask after executing local_flush_tlb_all_asid(). Signed-off-by: Xu Lu <luxu.kernel@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 1: "[v2,1/3] riscv: mm: Use ASID in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 2: "[v2,2/3] riscv: mm: Apply Svinval in update_mmu_cache()" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
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Patch 3: "[v2,3/3] riscv: mm: Clear cpu in mm_cpumask after local_flush_tlb_all_asid" |
PR for series 1128156 applied to workflow__riscv__fixes
Name: riscv: mm: Some optimizations for tlb flush
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1128156
Version: 2