[PW_SID:1124973] crypto: cmh - add CRI CryptoManager Hub driver#2259
[PW_SID:1124973] crypto: cmh - add CRI CryptoManager Hub driver#2259linux-riscv-bot wants to merge 21 commits into
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The regset_data buffer allocated with calloc() in the parent process of several vector ptrace tests is never freed before returning, causing memory leaks in: - ptrace_v_not_enabled - ptrace_v_early_debug - ptrace_v_syscall_clobbering - v_csr_invalid/ptrace_v_invalid_values - v_csr_valid/ptrace_v_valid_values Add free(regset_data) before kill(pid, SIGKILL) to release the allocated buffer. Signed-off-by: Wang Yan <wangyan01@kylinos.cn> Reviewed-by: Sergey Matyukevich <geomatsi@gmai.com> Link: https://patch.msgid.link/20260710083437.489648-1-wangyan01@kylinos.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
Add device tree binding schema for the CRI CryptoManager Hub (CMH) hardware crypto accelerator. The binding covers the parent SoC-level node with register region, interrupt, DMA properties, and per-core child nodes identified by compatible string and unit address. Register the 'cri' vendor prefix for Cryptography Research, Inc. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add the CRI CryptoManager Hub (CMH) hardware crypto accelerator core platform driver. This patch provides: - Platform driver registration and probe/remove lifecycle - Hardware configuration and core discovery - Mailbox Queue Interface (MQI) for VCQ command submission - Transaction manager with async completion and backlog support - Result handler with threaded-IRQ completion - DMA buffer management - Debugfs instrumentation (when CONFIG_CRYPTO_DEV_CMH_DEBUG=y) - Sysfs attributes (fw_version, hw_version, product, algorithms) - Kconfig and Makefile integration No crypto algorithms are registered yet -- those follow in subsequent patches. The driver communicates with the hardware via a mailbox-based VCQ (Virtual Command Queue) interface. Each crypto operation is packed into VCQ command entries, submitted to a mailbox, and completed asynchronously via interrupt. MODULE_IMPORT_NS(CRYPTO_INTERNAL) imports two symbols: - crypto_cipher_setkey() [crypto/cipher.c, EXPORT_SYMBOL_NS_GPL] - crypto_cipher_encrypt_one() [crypto/cipher.c, EXPORT_SYMBOL_NS_GPL] These are the single-block cipher API used for software-fallback paths: CCM empty-input tag computation (2 ECB encryptions + XOR) and XCBC(SM4) empty-message workaround (3 ECB encryptions + XOR). No public wrapper exists; this is the same pattern used by in-tree crypto/ccm.c, crypto/cmac.c, and crypto/xcbc.c. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add the CMH key management subsystem: - Key provisioning: create, import, derive, and destroy hardware keys stored in the CMH datastore - System object management: allocate and free CMH system objects - Management ioctl interface (/dev/cmh_mgmt): ioctl commands covering key lifecycle, KIC key derivation, PKE operations (RSA, ECDSA, ECDH, EdDSA), PQC operations (ML-KEM, ML-DSA, SLH-DSA), SM2, EAC, and DRBG reseeding - SM2 ioctl handlers: SM2 encrypt, decrypt, sign, and key exchange -- operations that require multi-step protocol flows not expressible through the standard crypto API sig interface - UAPI header: cmh_mgmt_ioctl.h (ioctl definitions and structures) The misc device requires CAP_SYS_ADMIN for open(). Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ahash algorithms for SHA-224, SHA-256, SHA-384, SHA-512, SHA3-224, SHA3-256, SHA3-384, SHA3-512, SHAKE128, and SHAKE256 using the CMH hash core (core ID 0x02). Supports incremental update/finup/final, init/export/import for request cloning, and the CRYPTO_AHASH_REQ_VIRT flag for zero-copy from virtual buffers. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ahash algorithms for HMAC-SHA-224, HMAC-SHA-256, HMAC-SHA-384, HMAC-SHA-512, HMAC-SHA3-224, HMAC-SHA3-256, HMAC-SHA3-384, and HMAC-SHA3-512 using the CMH hash core. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ahash algorithms for cSHAKE128, cSHAKE256, KMAC128, and KMAC256 using the CMH hash core. cSHAKE supports incremental update and export/import. KMAC has a 64KB data cap imposed by the hardware. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register the SM3 ahash algorithm using the CMH SM3 core (core ID 0x05). Supports incremental update/finup/final and export/import. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register AES algorithms using the CMH AES core (core ID 0x03): - skcipher: AES-ECB, AES-CBC, AES-CTR, AES-XTS, AES-CFB - aead: AES-GCM, AES-CCM - ahash: AES-CMAC Supports 128, 192, and 256-bit keys. AEAD algorithms handle associated data, payload, and authentication tag with correct encrypt/decrypt separation. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register SM4 algorithms using the CMH SM4 core (core ID 0x04): - skcipher: SM4-ECB, SM4-CBC, SM4-CTR, SM4-XTS, SM4-CFB - aead: SM4-GCM, SM4-CCM - ahash: SM4-CMAC, SM4-XCBC Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ChaCha20-Poly1305 AEAD and ChaCha20 skcipher algorithms using the CMH CCP core (core ID 0x18). Also registers the Poly1305 ahash for standalone use. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register the CMH DRBG core (core ID 0x0f) as an hwrng provider. The hardware implements a NIST SP 800-90A compliant DRBG with automatic self-seeding. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register the RSA akcipher algorithm using the CMH PKE core (core ID 0x0a). Supports encrypt, decrypt, sign, and verify operations with 2048, 3072, and 4096-bit keys. 512- and 1024-bit keys are also accepted for legacy/test interoperability. Includes common PKE helpers shared by subsequent ECDSA and ECDH patches. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ECDSA and SM2 sig algorithms using the CMH PKE core. Supports P-256, P-384, P-521, and SM2 curves for sign and verify operations. SM2 is registered as verify-only via the crypto API; full SM2 operations (encrypt, decrypt, key exchange) are available through the /dev/cmh_mgmt ioctl interface. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ECDH and X25519 kpp algorithms using the CMH PKE core. Supports P-256, P-384, and Curve25519 for key agreement. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register ML-KEM (Kyber) and ML-DSA (Dilithium) algorithms using the CMH QSE core (core ID 0x09). ML-KEM is ioctl-only (keygen, encaps, decaps). ML-DSA is registered as a sig algorithm with priority 5001 to override the kernel's verify-only mldsa implementation at priority 5000. This follows the established pattern where hardware drivers override software-only fallbacks (e.g. ccp at 300 over generic AES at 100, qat similarly). The CMH driver provides full HW-accelerated sign + verify vs the kernel's verify-only software implementation. Includes cmh_pqc_sizes.c with compile-time tables of PQC key and signature sizes for all supported parameter sets. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Register SLH-DSA, LMS, LMS-HSS, XMSS, and XMSS-MT algorithms using the CMH HCQ core (core ID 0x08). SLH-DSA is registered as a sig algorithm with sign and verify support. LMS, LMS-HSS, XMSS, and XMSS-MT are registered as verify-only sig algorithms: their stateful signing semantics (one-time-key private state the signer must track) are not modeled by the kernel crypto API, so only verification is exposed. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add Documentation/userspace-api/ioctl/cmh_mgmt.rst documenting the ioctl commands on the /dev/cmh_mgmt misc device for the CRI CryptoManager Hub (CMH) hardware crypto accelerator driver. Covers key management, KIC key derivation, PKE (RSA, ECDSA, ECDH, EdDSA), PQC (ML-KEM, ML-DSA, SLH-DSA), SM2, EAC, and DRBG. Link the page into the userspace-api/ioctl index toctree. Register ioctl magic number 'J' (0x4A) in ioctl-number.rst. The driver uses ioctls 0x01-0x40. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add a minimal kselftest exercising the /dev/cmh_mgmt ioctl interface: - open/close the device node - invalid ioctl returns -ENOTTY - bad version field returns -EINVAL - KEY_NEW + KEY_DELETE lifecycle - KIC HKDF1 key derivation - ML-KEM-768 keygen via hardware RNG Tests use the kselftest_harness.h fixture framework and output TAP. Tests that require hardware features not present on the device under test are gracefully skipped (SKIP). Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add MAINTAINERS entry for the CRI CryptoManager Hub (CMH) hardware crypto accelerator driver under drivers/crypto/cmh/. Co-developed-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Saravanakrishnan Krishnamoorthy <skrishnamoorthy@rambus.com> Signed-off-by: Alex Ousherovitch <aousherovitch@rambus.com> Reviewed-by: Joel Wittenauer <Joel.Wittenauer@cryptography.com> Reviewed-by: Thi Nguyen <thin@rambus.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 1: "[v2,01/19] dt-bindings: crypto: add Rambus CryptoManager Hub" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 18: "[v2,18/19] selftests: crypto: cmh - add kselftest for management ioctl" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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Patch 19: "[v2,19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH)" |
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PR for series 1124973 applied to workflow__riscv__fixes
Name: crypto: cmh - add CRI CryptoManager Hub driver
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1124973
Version: 2