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[Accton][minipack3bam] Restore SCM_CPLD default write protect and OOB control#1194

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[Accton][minipack3bam] Restore SCM_CPLD default write protect and OOB control#1194
brandonchuang wants to merge 1 commit into
facebook:mainfrom
brandonchuang:mp3bam_scm_wp

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Pre-submission checklist

  • I've ran the linters locally and fixed lint errors related to the files I modified in this PR. You can install the linters by running pip install -r requirements-dev.txt && pre-commit install
  • pre-commit run

Summary:

Remove the initRegSettings configuration for SCM_CPLD (register 0xB1) and rely on hardware default values instead.

Previously, we explicitly set register 0xB1 to 0x2 during CPLD initialization:

  • Bit[0] = 0: Disable SCM EEPROM write protect (writable)
  • Bit[1] = 1: Transfer OOB switch EEPROM control from 88E6321 to SCM

Using hardware default values provides better consistency and reduces the risk of misconfiguration during initialization. Write protection can be managed explicitly when needed rather than being disabled by default.

Changes:

  • Removed initRegSettings block from SCM_CPLD configuration
  • Register 0xB1 will now use hardware default value (0x1):
    • Bit[0] = 1: Enable SCM EEPROM write protect (default protected)
    • Bit[1] = 0: OOB switch EEPROM controlled by 88E6321 (default)

Test Plan:

  1. Build and deploy the updated configuration to the target platform
  2. Check platform manager logs for any CPLD-related errors
  3. Verify register 0xB1 uses default value (0x1):
    #Read register 0xB1 (decimal 177)
    i2cget -f -y 4 0x35 0xB1
    #Expected output: 0x01
    [mp3bam] platform_manager.txt
    [mp3bam] scm_write_protect_test.txt

… control

Summary:
Remove the initRegSettings configuration for SCM_CPLD (register 0xB1)
and rely on hardware default values instead.

Previously, we explicitly set register 0xB1 to 0x2 during CPLD initialization:
- Bit[0] = 0: Disable SCM EEPROM write protect (writable)
- Bit[1] = 1: Transfer OOB switch EEPROM control from 88E6321 to SCM

Using hardware default values provides better consistency and reduces
the risk of misconfiguration during initialization. Write protection
can be managed explicitly when needed rather than being disabled by default.

Changes:
- Removed initRegSettings block from SCM_CPLD configuration
- Register 0xB1 will now use hardware default value (0x1):
  - Bit[0] = 1: Enable SCM EEPROM write protect (default protected)
  - Bit[1] = 0: OOB switch EEPROM controlled by 88E6321 (default)

Test Plan:
1. Build and deploy the updated configuration to the target platform
2. Check platform manager logs for any CPLD-related errors
3. Verify register 0xB1 uses default value (0x1):
   # Read register 0xB1 (decimal 177)
   i2cget -f -y 4 0x35 0xB1
   # Expected output: 0x01
@brandonchuang brandonchuang requested a review from a team as a code owner May 14, 2026 08:27
@meta-cla meta-cla Bot added the CLA Signed label May 14, 2026
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