An open-hardware Eurorack step sequencer with onboard voice, built around the STM32F405RGT6 (WeAct core board). Tachyon generates two precision 1 V/oct CV outputs, two +5 V gate outputs, and two audio outputs, accepts two CV modulation inputs and an external clock, and is navigated via a rotary encoder, a parameter adjustment pot, and a 128×128 OLED screen.
| MCU | STM32F405RGT6 @ 168 MHz (WeAct 64-pin core board), 1 MB Flash, 192 KB RAM |
| Storage | MicroSD slot on the WeAct board (SDIO 4-bit) |
| CV outputs | 2 × 16-bit, 0–10 V, 1 V/oct, DAC8552 + OPA1642 ×4 |
| Gate outputs | 2 × 0/+5 V, 2N7002K level shift |
| CV inputs | 2 × bipolar modulation, OPA1642 attenuator → ADC1 |
| Clock input | +5 V trigger, TIM2 input capture (with internal BPM fallback) |
| Audio output | Stereo I²S, PCM5102A DirectPath |
| Display | 1.5″ 128×128 OLED (SSD1327, 4-bit grayscale, SPI) |
| Controls | Alps EC11E rotary encoder w/ push switch + Alps 100K pot |
| USB | USB-C on the WeAct board — USB MIDI class device, DFU flashing |
| Power | 10-pin Doepfer header, ±12 V only (local +5 V buck) |
| Format | Eurorack, 10 HP, 3-board sandwich (front / IO / backing) |
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hardware-design-plan.md — the master hardware plan. MCU pin budget, peripheral selection, input / display / DAC / op-amp choices with rationale.
These are schematic specs — per-pin connections, decoupling BOMs:
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cv-output-dac.md — precision CV chain: DAC8552 (U6) + REF5025 (U2) + OPA1642 (U7), ×4 non-inverting gain stage producing 0–10 V at 1 V/oct, with feedback-tap and output-protection rules.
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cv-input.md — 2 × bipolar Eurorack CV jacks through an OPA1642 (U23) inverting attenuator + 1.25 V bias stage into ADC1 (PA0/PA1), with BAT54S input clamping.
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gate-output.md — 2 × 0/+5 V gate/trigger outputs via 2N7002K MOSFET inverting drivers with pull-ups to the +5 V rail.
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clock-input.md — external +5 V clock jack routed to TIM2 input capture (PA2) with the same BAT54S clamp; firmware-generated BPM clock as the internal fallback.
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audio-output-dac.md — stereo audio chain: PCM5102A (U3) on I²S3, DirectPath outputs to two TS jacks,
~MUTEline, and per-pin decoupling.
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user-interface.md — front-panel I/O: SSD1327 OLED on dedicated SPI1, Alps EC11E quadrature encoder on TIM4 with EXTI push-switch, and a 100 K Alps pot into ADC1.
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power-supply.md — full power tree: +12 V input protection, +12 V → +5 V buck (TPS54202), the two TPS7A2033 low-noise LDOs for
+3V3_PRECand+3V3_AUDIO, and the rail current budget.
The module is a three-PCB sandwich: a front board (panel graphics, no electrical content), an IO board (panel-side jacks, pot, encoder, and OLED ribbon connector), and a backing board (the dense analog/digital board with the buck, LDOs, references, DACs, op-amps, and the WeAct STM32 module on its bottom side). The boards mate via inter-board pin headers.
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pcb-design.md — PCB stackup, ground plane rules (one continuous Layer 2 plane, no splits), power pour regions, placement zones, and signal routing guidance for the backing board, plus the inter-board header map.
The gerber/ folder holds the latest fab/assembly
exports for all three boards, plus the per-board audit reports
(audit-front-board.md,
audit-io-board.md,
audit-backing-board.md)
created by the included pcb-designer
skill for Claude that cross-check each export against the design
docs. Combined per-board schematic PDFs live at the repo root:
io-board-schematic.pdf,
mcu-audio-board-schematic.pdf.
The EasyEDA Pro source project is tachyon.eprj.
- calibration.md — one-time CV output calibration procedure (two-point slope/offset fit against a DMM) for the precision DAC path.
The datasheets/ folder holds per-part markdown
summaries (pinout, key electrical specs, application notes)
extracted from the manufacturer PDFs for every non-passive component
in the BOM. The PDFs live alongside each .md summary. Root-level
docs cite these with paths like DAC8552.md:72 when a specific
paragraph matters.
- firmware/README.md — DFU flashing instructions and firmware build notes.
- EasyEDA — schematic/PCB design
- Claude Code — schematic/PCB validation and planning
- STM32CubeMX — STM32 peripheral and clock configuration
- Claude Code — firmware development
Both hardware (schematic/PCB) and firmware design are supported in
Claude Code. The included markdown files — including MD versions of
the datasheets for key components — for the hardware design and the
pcb-designer skill allow Claude to
reason about design changes to both hardware and software without
needing additional context to be shared within Claude.
Hardware (schematics, PCB, mechanical) is licensed under the CERN Open Hardware Licence Version 2 — Strongly Reciprocal (CERN-OHL-S v2).
Firmware (everything under firmware/) is licensed
separately under the MIT License.
Copyright © 2026 Stig Manning.