You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
{{ message }}
This repository was archived by the owner on Mar 17, 2026. It is now read-only.
Here's a concise summary of the major changes in this LLVM IR diff:
Simplified bit-field extraction and condition logic in _ZN4fish12input_common16InputEventQueuer9parse_csi...:
The original code performed multiple lshr/trunc operations to extract individual byte fields from an i40 value (%.sroa.3.0.extract.shift21, %.sroa.6.0.extract.shift23, etc.), followed by complex boolean logic involving or, xor, and icmp ne. The patch eliminates most of those extractions and replaces the condition with a single masked and i40 %9, 4311744769 (≈ 0x100A0001) and icmp eq against 4294967296 (0x10000000), significantly reducing instruction count and control flow complexity.
Elimination of redundant phi node inputs and basic blocks:
The .sroa.414.0 phi node is now fed only from %3 and %15 (previously %3 and %17), and the branch target labels are renumbered and merged (e.g., %16 → %12, %17 → %15). This reflects CFG simplification — likely due to dead code elimination or more aggressive jump-threading after the logic rewrite.
Optimized bit-packing for KeyEvent::with_shifted_codepoint:
The multi-step or disjoint sequence building a 32-bit value from shifted/truncated fields is replaced with a single and i32 %13, -16711681 (i.e., 0xFF00FFFF) followed by or disjoint with the shifted i8→i32 value. This preserves the intended bit layout (masking out bits 8–15) while removing 5+ intermediate instructions and unnecessary truncations/shifting.
Consistent transformation across duplicated function bodies:
Identical optimizations are applied to two nearly identical copies of the same function (at offsets ~39582 and ~39631), indicating the change targets a common code pattern—likely resulting from inlining or template instantiation—and was applied uniformly post-optimization.
Cleanup in SMTConstraintManager::checkModel:
In SMTConstraintManager.ll, the unused lshr i16 %25, 8 (.sroa.5.0.extract.shift) is removed. The branching logic around %28 == 257 / == 256 is streamlined: redundant trunc/xor/and chains are replaced with direct and+icmp pairs, and the CFG is flattened (e.g., %35 → %33, %39 → %37), reducing block count and improving predictability.
Overall, these changes reflect aggressive peephole and DAG-combining optimizations—replacing verbose, multi-instruction bit manipulations with compact, semantically equivalent patterns—leading to smaller, faster, and more analyzable IR.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Link: llvm/llvm-project#184246
Requested by: @andjo403