Filet-O-Croc

Optimize the “Croc.” SoC core with custom arithmetic units and design-space parameterization.

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_{Sample floorplan: 0.85 aspect ratio + 3 SRAM banks (in OpenROAD)}

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Table of Contents

1. Team
2. Project Overview
3. Repository Structure
4. Optimizations
   • 1. Custom VLSIFFRA Multiplier & Adder
   • 2. DSE: Aspect Ratio & SRAM Banks
5. Build & Run
6. Results
7. Conclusions
8. Division of Labor
9. License & Acknowledgments

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Team

• Team Name: Filet-O-Croc
• Repo URL: https://github.com/ABKCourses/ece260c-final-filet-o-croc

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Project Overview

In this project, we took the baseline Croc SoC and implemented two major improvements:

1. Custom arithmetic units via the VLSIFFRA library (Han-Carlson multipliers & adders) to boost PPA.
2. Design-Space Exploration (DSE) tooling to parameterize die aspect ratio and number of SRAM banks, enabling rapid exploration of trade-offs between timing, area, and power.

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Repository Structure

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Optimizations

1. Custom VLSIFFRA Multiplier & Adder

• Goal: Replace vanilla 34-bit multipliers/adders in the CVE2 core with Han-Carlson variants for better PPA.
• Implementation
  1. Cloned and installed the VLSIFFRA repo as a Python package.
  2. Added IHP130 technology support + built full/half-adder primitives.
  3. Generated adder.v & multiplier.v via tech.py.
  4. Created SV wrappers in rtl/cve2_alu.sv and updated Makefile + bender.yml to include them.
  5. Manually instantiated wrappers at critical ALU sites (failed auto-techmap due to memory blowup).

2. DSE: Aspect Ratio & SRAM Banks

• Goal: Let users pass in ASPECT_RATIO and SRAM_BANKS at build time to drive floorplanning and RTL instantiation.
• Implementation
  1. Extended the Makefile to export ASPECT_RATIO & SRAM_BANKS as environment variables.
  2. In tcl/chip.tcl & tcl/floorplan.tcl, dynamically set die width/height.
  3. Parametrized instance.tcl & RTL (crpc_pkg.sv) to generate up to 6 SRAM banks.
  4. Discovered max safe banks = 5; beyond that OpenROAD placed pins inside SRAM blocks.
  5. Explored combinations (e.g. ASPECT_RATIO=0.85, SRAM_BANKS=3) for best trade-off.

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Build & Run

# 1. Clone repo and enter working directory
git clone https://github.com/ABKCourses/ece260c-final-filet-o-croc.git
cd ece260c-final-filet-o-croc/croc

# 2. Checkout and synthesize baseline (fast multiplier variant):
make clean
make yosys FAST_MULT=1

# 3. Floorplan + PnR (default ASP=1.0, SRAM=2):
make openroad

# 4. To explore params, e.g. AR=0.85, 3 banks:
make clean
ASPECT_RATIO=0.85 SRAM_BANKS=3 make all
make openroad