High-Frequency Trading Order Book 🚀

A ultra-low-latency limit order book implementation in C++ designed for high-frequency trading systems. Achieves sub-100 nanosecond latency with 6-10 million operations per second throughput.

🎯 Performance Metrics

Latency (Benchmark.cpp - Bulk Operations)

• Best: 99.2 ns per operation
• Average: 120-165 ns per operation
• Throughput: 6-10 million ops/sec

Detailed Performance (detailed_benchmark.cpp)

Operation	Throughput	Avg Latency
add_order (empty book)	8-13M ops/sec	40-65 ns
add_order (populated)	10-14M ops/sec	37-48 ns
cancel_order	11-16M ops/sec	26-39 ns
amend_order (quantity)	12-17M ops/sec	27-35 ns
amend_order (price)	14-17M ops/sec	26-30 ns
Mixed Workload	1.3-1.7M ops/sec	55-75 ns

Note: Mixed workload has lower throughput due to per-operation timing overhead (~50-100ns from high_resolution_clock::now() calls)

🔧 Architecture & Optimizations

Core Data Structures

1. FastHashMap - Custom Hash Table

• Capacity: 1,048,576 entries (2^20)
• Hash Function: Simple XOR shift (key ^ (key >> 32))
• Collision Resolution: Linear probing
• Memory: Pre-allocated, zero-initialization
• Key Optimizations:
  • Minimal hash computation (single XOR + shift)
  • Power-of-2 sizing for fast modulo (bitwise AND)
  • Backward-shift deletion for tombstone-free operation
  • [[likely]]/[[unlikely]] branch hints

2. Memory Pools - Zero-Allocation Design

OrderNode Pool: 2,048 blocks = 128 KB
Limit Pool:     1,024 blocks = 40 KB

• Pre-allocated: All memory allocated at startup
• O(1) allocation/deallocation: Free-list based
• Cache-friendly: Sequential allocation pattern
• No fragmentation: Fixed-size blocks

3. Limit Struct - Cache-Line Optimized

struct Limit {
    int64_t price;          // 8 bytes - Fixed-point (4 decimals)
    int64_t total_quantity; // 8 bytes - Aggregate quantity
    OrderNode* head;        // 8 bytes - FIFO queue head
    OrderNode* tail;        // 8 bytes - FIFO queue tail
    bool is_bid;            // 1 byte - Side flag
    // Total: 32 bytes (half cache line)
};

4. Price Level Storage

• Container: std::vector (dynamic array)
• Ordering: Sorted (descending for bids, ascending for asks)
• Search: Linear iteration (cache-friendly for small N, typically 10-100 levels)
• Removal Strategy: Reverse iteration (empty limits likely at ends)

Key Algorithmic Optimizations

1. Conditional Matching

if ((is_bid && price >= best_ask_price) || 
    (!is_bid && price <= best_bid_price)) {
    match_orders();
}

• Only invoke matching logic when orders cross the spread
• Eliminates ~90% of unnecessary match calls for passive orders

2. Reverse Iteration for Cancel

// Search from back - empty limits likely at price extremes
for (auto it = limits.rbegin(); it != limits.rend(); ++it)

• Exploits typical market microstructure
• Reduces search time for limit removal

3. Fixed-Point Arithmetic

int64_t price_to_int(double price) {
    return static_cast<int64_t>(price * 10000);
}

• Avoids floating-point comparison issues
• 4 decimal precision (0.0001 tick size)
• Integer operations are faster than floating-point

🛠️ Build System

Quick Start

# Build all benchmarks
make

# Build and run main benchmark
make run

# Build and run detailed benchmark
make run-detailed

# Run 10 test iterations for statistical analysis
make test

# Profile-guided optimization (advanced)
make pgo

# Debug build
make debug

# Clean artifacts
make clean

Compiler Flags

-std=c++17           # Modern C++ features
-O3                  # Maximum optimization
-march=native        # CPU-specific instructions (AVX2, SSE4, etc.)
-mtune=native        # CPU-specific tuning
-flto=auto           # Link-time optimization
-ffast-math          # Aggressive math optimizations
-funroll-loops       # Loop unrolling
-finline-functions   # Aggressive inlining
-fomit-frame-pointer # Extra register for optimization
-pipe                # Faster compilation (use pipes)
-static              # Static linking for deployment

📊 Benchmark Details

Benchmark.cpp

• Operations: 5,000,000 mixed operations
• Mix: 40% add, 30% cancel, 30% amend
• Measurement: Bulk timing (start to finish)
• Purpose: Real-world throughput measurement

detailed_benchmark.cpp

• Scenarios: 8 different workload patterns
• Measurement: Per-operation timing with std::chrono::high_resolution_clock
• Statistics: Min, Max, Avg, P50, P95, P99 latencies
• Purpose: Detailed performance profiling

Important: Per-operation timing adds ~50-100ns overhead, artificially inflating latencies. Bulk measurements (Benchmark.cpp) reflect true performance.

🎓 Design Decisions

Why Not std::unordered_map?

• Heap allocations: Every insert/erase triggers malloc/free
• Hash function overhead: std::hash is general-purpose, not optimized
• Bucket management: Complex chaining logic
• Custom FastHashMap: 3-5x faster for our use case

Why Memory Pools?

• Predictable latency: No malloc jitter
• Cache locality: Sequential allocation
• Zero fragmentation: Fixed-size blocks
• Fast deallocation: O(1) free-list insertion

Why std::vector over std::map?

• Cache-friendly: Contiguous memory for linear traversal
• Linear search beats binary search: For small N (10-100 price levels), linear iteration is faster due to:
  • Sequential memory access (prefetching)
  • No pointer chasing
  • Better instruction pipelining
  • Cache-line utilization
• Small N optimization: O(n) linear search < O(log n) binary search when n < ~50
• Insertion cost: Amortized by infrequent price level creation

Why Not Lock-Free Structures?

• Single-threaded: No contention
• Complexity: Lock-free adds overhead without multi-threading
• Simplicity: Deterministic performance easier to optimize

🧪 Testing & Validation

Correctness Tests

• ✅ FIFO matching within price levels
• ✅ Price-time priority across levels
• ✅ Partial fills and order amendments
• ✅ Empty book edge cases
• ✅ Matching engine crossing spread detection

Performance Testing

# Single run
make run

# 10 iterations for variance analysis
make test

# Detailed profiling
make run-detailed

📈 Performance Evolution

Optimization	Latency	Throughput	Improvement
Baseline (std::unordered_map)	~500 ns	2M ops/sec	-
Custom FastHashMap	~300 ns	3.3M ops/sec	1.65x
Memory Pools	~200 ns	5M ops/sec	2.5x
Conditional Matching	~150 ns	6.7M ops/sec	3.3x
Hash Optimization	~120 ns	8.3M ops/sec	4.2x
Current (All Combined)	~100 ns	10M ops/sec	5x

🔍 Profiling Tips

Measure Variance

make test > results.txt
# Analyze min/max/avg from 10 runs

CPU Performance Counters

# Linux: perf stat
perf stat -e cycles,instructions,cache-misses,branch-misses ./Benchmark.exe

# Windows: Intel VTune or AMD uProf

Assembly Inspection

# Generate assembly with optimizations
g++ -S -O3 -march=native Order_Book.cpp -o Order_Book.s

🚀 Future Optimizations

Potential Improvements

1. SIMD for bulk operations - AVX2/AVX-512 for parallel processing
2. Hardware prefetching hints - __builtin_prefetch() for predictable access
3. Template specialization - Compile-time side (bid/ask) branching
4. Cache-line alignment - alignas(64) for critical structures
5. Lock-free MPMC queue - Multi-threaded support

Known Limitations

• Single-threaded: No concurrent order entry
• In-memory only: No persistence layer
• No market data feed: Snapshot generation is synchronous
• Fixed precision: 4 decimal places hardcoded

📝 Code Structure

OrderBook/
├── common.h              # Core data structures (Order, Limit, Trade)
├── fast_hash_map.h       # Custom hash table implementation
├── memory_pool.h         # Fixed-block memory allocator
├── order_book.h          # OrderBook class interface
├── Order_Book.cpp        # OrderBook implementation
├── Benchmark.cpp         # Bulk performance test
├── detailed_benchmark.cpp # Detailed profiling test
├── Makefile              # Optimized build system
└── README.md             # This file

🎯 Use Cases

• Backtesting Engines: Ultra-fast historical order simulation
• Market Simulators: Realistic latency for strategy testing
• Educational: Learn HFT order book internals
• Prototyping: Foundation for production trading systems

📄 License

This project is open-source. Use at your own risk in production systems.

🤝 Contributing

Contributions welcome! Areas of interest:

• SIMD optimizations
• Multi-threading support
• Additional benchmarks
• Documentation improvements

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Built for speed. Optimized for latency. Designed for HFT. ⚡