DRAFT-DRAFT: Cpu profiles #1: CPUID feature restriction

.github/workflows/quality.yaml

@@ -143,4 +143,4 @@ jobs:
     steps:
       - uses: actions/checkout@v4
       # Executes "typos ."
-      - uses: crate-ci/typos@v1.33.1
+      - uses: crate-ci/typos@v1.34.0

arch/Cargo.toml

@@ -17,6 +17,7 @@ hypervisor = { path = "../hypervisor" }
 libc = "0.2.167"
 linux-loader = { workspace = true, features = ["bzimage", "elf", "pe"] }
 log = "0.4.22"
+paste = { version = "1"}
 serde = { version = "1.0.208", features = ["derive", "rc"] }
 thiserror = { workspace = true }
 uuid = { workspace = true }

arch/src/lib.rs

@@ -12,10 +12,11 @@
 extern crate log;
 
 use std::collections::BTreeMap;
+use std::str::FromStr;
 use std::sync::Arc;
 use std::{fmt, result};
 
-use serde::{Deserialize, Serialize};
+use serde::{de::IntoDeserializer, Deserialize, Serialize};
 use thiserror::Error;
 
 #[cfg(target_arch = "x86_64")]
@@ -59,6 +60,29 @@ pub enum Error {
 /// Type for returning public functions outcome.
 pub type Result<T> = result::Result<T, Error>;
 
+#[cfg(target_arch = "x86_64")]
+pub use crate::x86_64::{CpuIdEntryRegister, CpuIdFeatureFlags, CpuProfile};
+#[cfg(not(target_arch = "x86_64"))]
+#[derive(Debug, Default, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
+#[serde(rename_all = "kebab-case")]
+pub enum CpuProfile {
+    #[default]
+    Host,
+}
+
+impl FromStr for CpuProfile {
+    type Err = serde::de::value::Error;
+    fn from_str(s: &str) -> result::Result<Self, Self::Err> {
+        // Should accept both plain strings, and strings surrounded by `"`.
+        let normalized = s
+            .strip_prefix('"')
+            .unwrap_or(s)
+            .strip_suffix('"')
+            .unwrap_or(s);
+        Self::deserialize(normalized.into_deserializer())
+    }
+}
+
 /// Type for memory region types.
 #[derive(Clone, Copy, PartialEq, Eq, Debug, Serialize, Deserialize)]
 pub enum RegionType {

arch/src/x86_64/cpu_profile/cpuid_feature_flags_impl.rs

@@ -0,0 +1,93 @@
+use crate::x86_64::cpuid_feature_flags::{CpuIdEntryRegister, CpuIdFeatureFlags};
+
+impl CpuIdFeatureFlags {
+    pub const fn intel_cascadelake_v1() -> Self {
+        use CpuIdEntryRegister as FF;
+
+        Self {
+            edx_1: FF::VME
+                .or(FF::SSE2)
+                .or(FF::SSE)
+                .or(FF::FXSR)
+                .or(FF::MMX)
+                .or(FF::CLFLUSH)
+                .or(FF::PSE36)
+                .or(FF::PAT)
+                .or(FF::CMOV)
+                .or(FF::MCA)
+                .or(FF::PGE)
+                .or(FF::MTRR)
+                .or(FF::SEP)
+                .or(FF::APIC)
+                .or(FF::CX8)
+                .or(FF::MCE)
+                .or(FF::PAE)
+                .or(FF::MSR)
+                .or(FF::TSC)
+                .or(FF::PSE)
+                .or(FF::DE)
+                .or(FF::FPU),
+
+            ecx_1: FF::AVX
+                .or(FF::XSAVE)
+                .or(FF::AES)
+                .or(FF::POPCNT)
+                .or(FF::X2APIC)
+                .or(FF::SSE4_2)
+                .or(FF::SSE4_1)
+                .or(FF::CX16)
+                .or(FF::SSSE3)
+                .or(FF::PCLMULQDQ)
+                .or(FF::SSE3)
+                .or(FF::TSC_DEADLINE)
+                .or(FF::FMA)
+                .or(FF::MOVBE)
+                .or(FF::PCID)
+                .or(FF::F16C)
+                .or(FF::RDRAND),
+
+            edx_8000_0001h: FF::LM
+                .or(FF::PDPE1GB)
+                .or(FF::RDTSCP)
+                .or(FF::NX)
+                .or(FF::SYSCALL),
+            ecx_8000_0001h: FF::ABM.or(FF::LAHF_LM).or(FF::PREFETCH_3DNOW),
+            ebx_7_0: FF::FSGSBASE
+                .or(FF::BMI1)
+                .or(FF::HLE)
+                .or(FF::AVX2)
+                .or(FF::SMEP)
+                .or(FF::BMI2)
+                .or(FF::ERMS)
+                .or(FF::INVPCID)
+                .or(FF::RTM)
+                .or(FF::RDSEED)
+                .or(FF::ADX)
+                .or(FF::SMAP)
+                .or(FF::CLWB)
+                .or(FF::AVX512F)
+                .or(FF::AVX512DQ)
+                .or(FF::AVX512BW)
+                .or(FF::AVX512CD)
+                .or(FF::AVX512VL)
+                .or(FF::CLFLUSHOPT),
+            ecx_7_0: FF::PKU.or(FF::AVX512VNNI),
+            edx_7_0: FF::SPEC_CTRL.or(FF::SSBD),
+            eax_0dh_1: FF::XSAVEOPT.or(FF::XSAVEC).or(FF::XGETBV1),
+            eax_7_1: FF::NULL,
+            ecx_7_1: FF::NULL,
+            edx_7_1: FF::NULL,
+            edx_7_2: FF::NULL,
+            ecx_14h: FF::NULL,
+            ecx_24h_1: FF::NULL,
+            /*
+            Caskadelake Server only supports TscInvariant, but this feature cannot be relied upon in the context of migration hence we also leave that turned off.
+            TODO: Isnt't this feature very useful when the VM is running normally though? (i.e. outside of migrations).
+             */
+            edx_8000_0007h: FF::NULL,
+            ebx_8000_0008h: FF::NULL,
+            edx_8000_000ah: FF::NULL,
+            eax_8000_0021h: FF::NULL,
+        }
+    }
+}

arch/src/x86_64/cpu_profile/mod.rs

@@ -0,0 +1,8 @@
+mod cpuid_feature_flags_impl;
+#[derive(Debug, Default, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
+#[serde(rename_all = "kebab-case")]
+pub enum CpuProfile {
+    #[default]
+    Host,
+    CascadelakeServerV1,
+}