rv32c: complete the Zcb extension (unblocks RP2350 flash/bootrom boot)#1
Open
prat96 wants to merge 1 commit into
Open
rv32c: complete the Zcb extension (unblocks RP2350 flash/bootrom boot)#1prat96 wants to merge 1 commit into
prat96 wants to merge 1 commit into
Conversation
The decoder handled only c.lbu/c.lhu/c.not from Zcb. The RP2350 boot ROM is compiled with Zcb, so every flash binary aborts in early ROM with e.g. "Unknown compressed instruction: 0x9fe1" (c.zext.b) or "Unsupported Zcb instruction: 0x8c24" (c.sh). Add the rest of Zcb, decompressing each to an instruction the core already runs: c.zext.b->andi, c.sext.b/c.sext.h->Zbb, c.zext.h->pack(rd,rd,x0), c.not->xori, c.mul->mul, and the c.lh/c.sb/c.sh loads/stores. c.zext.w is RV64-only and left out. Adds src/riscv/rv32c-zcb.spec.ts (9 cases, including the two real bootrom encodings that originally blocked boot). Full suite stays green. Signed-off-by: Pratheek Balakrishna <pratheekb96@gmail.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
What
Completes RV32 Zcb compressed-instruction decoding in
src/riscv/rv32c.ts. The decoderpreviously handled only
c.lbu,c.lhu, andc.not; this adds the rest of the extension:c.lh,c.sb,c.shc.zext.b,c.sext.b,c.zext.h,c.sext.hc.mulEach is decompressed to an instruction the core already executes —
andi,sext.b/sext.h(Zbb),
pack rd,rd,x0(=zext.h),xori,mul(RV32M), andlh/sb/sh.Why
The RP2350 boot ROM is built with Zcb, so these encodings appear during early boot. With
them missing, any RP2350 flash binary aborts almost immediately — booting a real board's
firmware died at
Unknown compressed instruction: 0x9fe1(c.zext.b) inside the ROM, thenUnsupported Zcb instruction: 0x8c24(c.sh). Completing Zcb lets flash images boot throughthe ROM. (The
rp2350js/WIPREADME already listsRV32Zcb (lbu, lhu, not)as partial.)Tests
Adds
src/riscv/rv32c-zcb.spec.ts— 9 cases covering every new opcode, including the two realbootrom encodings (
0x9fe1,0x8c24) that triggered this.npx vitest runis green(355 passed, including the existing suite).
Notes
c.zext.wis RV64-only and intentionally not handled.decompress_rv32c_inst"cannot handle index" error include the raw encodingand PC, which is what made the missing instructions easy to spot.
Based on
rp2350js/WIP.