adi-adbms6830: update to 0.14.x

packages/adi-adbms6830/.gitignore

@@ -3,3 +3,4 @@
 .vscode/c_cpp_properties.json
 .vscode/launch.json
 .vscode/ipch
+__pycache__/

packages/adi-adbms6830/README.md

@@ -1,4 +1,6 @@
-# ADBMS6830
+# Analog Devices ADBMS6830 Battery Monitor
+
+16-channel cell monitor with 16 cell sense and bleed inputs, SPI and isoSPI interfaces, and 10 GPIOs.
 
 For a guide on getting started with this chip checkout: https://blog.atopile.io/p/getting-started-with-adbms6830
 
@@ -16,22 +18,15 @@ from "atopile/indicator-leds/indicator-leds.ato" import LEDIndicatorBlue
 from "atopile/indicator-leds/indicator-leds.ato" import LEDIndicatorGreen
 from "atopile/ti-ts5a22362/ti-ts5a22362.ato" import Texas_Instruments_TS5A22362DGSR
 
-from "parts/Liansheng_BH_00019/Liansheng_BH_00019.ato" import Liansheng_BH_00019_package
-from "parts/XFCN_PZ254V_11_02P/XFCN_PZ254V_11_02P.ato" import XFCN_PZ254V_11_02P_package
-from "parts/HCTL_PM254_2_10_S_8_5/HCTL_PM254_2_10_S_8_5.ato" import HCTL_PM254_2_10_S_8_5_package
 from "parts/HRS_DF40HC_3_0__30DS_0_4V_51/HRS_DF40HC_3_0__30DS_0_4V_51.ato" import HRS_DF40HC_3_0__30DS_0_4V_51_package
 from "parts/HRS_DF40C_30DP_0_4V_51/HRS_DF40C_30DP_0_4V_51.ato" import HRS_DF40C_30DP_0_4V_51_package
 from "parts/SHOU_HAN_MSK12C02_HB/SHOU_HAN_MSK12C02_HB.ato" import SHOU_HAN_MSK12C02_HB
 
 import DifferentialPair
-import Electrical
 import ElectricLogic
 import ElectricPower
 import ElectricSignal
 import Resistor
-import ResistorVoltageDivider
-
-import can_bridge_by_name
 import has_part_removed
 
 ## DF40 3mm stack Connectors:
@@ -131,10 +126,9 @@ module Usage:
     sbi.isoSPI_up.p.line ~ adbms6830.iso_b_external.p.line
 
     # ISOSPI loopback switch
-    SPDT = new SHOU_HAN_MSK12C02_HB # 1x2~3
     trait has_part_removed
+    SPDT = new SHOU_HAN_MSK12C02_HB # 1x2~3
     analog_DPDT = new Texas_Instruments_TS5A22362DGSR
-    trait has_part_removed
     switch_resistors = new Resistor[2]
     for switch_resistor in switch_resistors:
         switch_resistor.package = "0402"
@@ -266,7 +260,6 @@ module Usage:
     sbi.isoSPI_passthru.n.line.override_net_name = "ISOpass_N"
 
     atopile_logo = new atopile_logo_25x6mm
-    trait has_part_removed
 
 module TempSensor:
     # -40~+125 100mW 10kΩ ±1% 0402 NTC Thermistors ROHS
@@ -279,11 +272,11 @@ module TempSensor:
     r_bottom.resistance = 10kohm +/- 0.1%
     r_bottom.package = "0402"
 
-    power.hv ~ r_top.p1
-    r_top.p2 ~ r_bottom.p1
-    power.lv ~ r_bottom.p2
+    power.hv ~ r_top.unnamed[0]
+    r_top.unnamed[1] ~ r_bottom.unnamed[0]
+    power.lv ~ r_bottom.unnamed[1]
 
-    output.line ~ r_top.p2
+    output.line ~ r_top.unnamed[1]
     output.reference.lv ~ power.lv
 
 module StackableBMBInterface:
@@ -384,3 +377,11 @@ module StackableBMBInterface:
     cell_sense_down.30 ~ cell_sense_up.30
 
 ```
+
+## Contributing
+
+Contributions to this package are welcome via pull requests on the GitHub repository.
+
+## License
+
+This atopile package is provided under the [MIT License](https://opensource.org/license/mit/).

packages/adi-adbms6830/adi-adbms6830.ato

@@ -1,30 +1,21 @@
 #pragma experiment("MODULE_TEMPLATING")
 #pragma experiment("FOR_LOOP")
 #pragma experiment("BRIDGE_CONNECT")
-
-# from "generics/interfaces.ato" import SPI, ISOSPI, Power, DiffPair
-# from "generics/filters.ato" import DifferentialLowPassFilter, LowPassFilter
-# from "generics/inductors.ato" import FerriteBead
-# from "generics/resistors.ato" import Resistor
-# from "generics/capacitors.ato" import Capacitor
-# from "generics/vdivs.ato" import _VDiv
+#pragma experiment("TRAITS")
 
 import BJT
 import Capacitor
 import DifferentialPair
 import Electrical
 import ElectricPower
 import ElectricSignal
-import FilterElectricalRC
-import Inductor
 import Resistor
-import ResistorVoltageDivider
 import SPI
+import can_bridge_by_name
 
 from "parts/Analog_Devices_ADBMS6830MWCCSZ/Analog_Devices_ADBMS6830MWCCSZ.ato" import Analog_Devices_ADBMS6830MWCCSZ_package
 from "input-filters.py" import ADBMS6830InputFilters
 from "parts/Diodes_Incorporated_FZT853TA/Diodes_Incorporated_FZT853TA.ato" import Diodes_Incorporated_FZT853TA_package
-from "parts/SHOU_HAN_MINI_MSK12CO2/SHOU_HAN_MINI_MSK12CO2.ato" import SHOU_HAN_MINI_MSK12CO2_package
 from "parts/Murata_Electronics_BLM15HD182SN1D/Murata_Electronics_BLM15HD182SN1D.ato" import Murata_Electronics_BLM15HD182SN1D_package
 
 module ADI_ADBMS6830:
@@ -94,7 +85,7 @@ module ADI_ADBMS6830:
     """
     SPI interface for communication with port A of the ADBMS6830
     """
-    spi.reference_shim.lv ~ vreg.lv
+    spi.has_single_electric_reference.reference.lv ~ vreg.lv
     spi_cs.reference.lv ~ vreg.lv
 
     gpios = new ElectricSignal[9]
@@ -143,38 +134,37 @@ module ADI_ADBMS6830:
     npn = new Diodes_Incorporated_FZT853TA
     vreg_fb = new BLM15HD182SN1D
 
-    # --- Power Supply Filters ---
-    vreg_input_filter = new FilterElectricalRC
-    vreg_input_filter.resistor.resistance = 330ohm +/- 10%
-    vreg_input_filter.resistor.package = "1206"
-    vreg_input_filter.capacitor.capacitance = 10nF +/- 20%
-    vreg_input_filter.capacitor.package = "0805"
-    vreg_input_filter.cutoff_frequency = 30kHz to 70kHz
-    vreg_input_filter.reference_shim.lv ~ vbat.lv
-    assert vreg_input_filter.capacitor.max_voltage within 100V to 200V
-
-    vreg_drive_filter = new FilterElectricalRC
-    vreg_drive_filter.resistor.resistance = 10ohm +/- 10%
-    vreg_drive_filter.resistor.package = "0402"
-    vreg_drive_filter.capacitor.capacitance = 10nF +/- 20%
-    vreg_drive_filter.capacitor.package = "0402"
-    vreg_drive_filter.cutoff_frequency = 1MHz to 3MHz
-    vreg_drive_filter.reference_shim.lv ~ vreg.lv
-
-    vplus_filter = new FilterElectricalRC
-    vplus_filter.resistor.resistance = 1kohm +/- 10%
-    vplus_filter.resistor.package = "0805"
-    vplus_filter.capacitor.capacitance = 10nF +/- 20%
-    vplus_filter.capacitor.package = "0805"
-    vplus_filter.cutoff_frequency = 10kHz to 30kHz
-    vplus_filter.reference_shim.lv ~ vbat.lv
-
-    vbat.hv ~> vreg_input_filter ~> npn ~> vreg_fb ~> vreg.hv
-    vreg_drive.line ~> vreg_drive_filter ~> npn.base
+    # --- Power Supply Filters (inline R+C, avoids FilterElectricalRC solver issue) ---
+    vreg_input_r = new Resistor
+    vreg_input_r.resistance = 330ohm +/- 10%
+    vreg_input_r.package = "1206"
+    vreg_input_c = new Capacitor
+    vreg_input_c.capacitance = 10nF +/- 20%
+    vreg_input_c.package = "0805"
+    assert vreg_input_c.max_voltage within 100V to 200V
+
+    vreg_drive_r = new Resistor
+    vreg_drive_r.resistance = 10ohm +/- 10%
+    vreg_drive_r.package = "0402"
+    vreg_drive_c = new Capacitor
+    vreg_drive_c.capacitance = 10nF +/- 20%
+    vreg_drive_c.package = "0402"
+
+    vplus_r = new Resistor
+    vplus_r.resistance = 1kohm +/- 10%
+    vplus_r.package = "0805"
+    vplus_c = new Capacitor
+    vplus_c.capacitance = 10nF +/- 20%
+    vplus_c.package = "0805"
+
+    vbat.hv ~> vreg_input_r ~> npn ~> vreg_fb ~> vreg.hv
+    vreg_input_r.unnamed[1] ~> vreg_input_c ~> vbat.lv
+    vreg_drive.line ~> vreg_drive_r ~> npn.base
+    vreg_drive_r.unnamed[1] ~> vreg_drive_c ~> vreg.lv
     vreg.lv ~ vbat.lv
 
-    vbat.hv ~> vplus_filter ~> asic_vp.hv
-    vbat.lv ~ vplus_filter.reference_shim.lv
+    vbat.hv ~> vplus_r ~> asic_vp.hv
+    vplus_r.unnamed[1] ~> vplus_c ~> vbat.lv
     # vbat.hv ~ cell_stack[-1].hv
     vbat.lv ~ cell_stack[0].lv
 
@@ -222,12 +212,13 @@ module ADI_ADBMS6830:
     iso_b_internal.p.line ~> isoSPI_termination_resistors[2] ~> iso_b_termination_midpoint; iso_b_termination_midpoint ~> isoSPI_termination_resistors[3] ~> iso_b_internal.n.line
     iso_b_termination_midpoint ~> isoSPI_dc_bias_caps[1] ~> vreg.lv
 
-    # C9N Filter Network
-    c9n_filter = new FilterElectricalRC
-    c9n_filter.resistor.resistance = 200ohm +/- 5%
-    c9n_filter.capacitor.capacitance = 10nF +/- 20%
-    cell_stack[8].lv ~> c9n_filter ~> package.C9N
-    c9n_filter.in_.reference.lv ~ cell_sense_inputs[7].p.line
+    # C9N Filter Network (inline R+C)
+    c9n_r = new Resistor
+    c9n_r.resistance = 200ohm +/- 5%
+    c9n_c = new Capacitor
+    c9n_c.capacitance = 10nF +/- 20%
+    cell_stack[8].lv ~> c9n_r ~> package.C9N
+    c9n_r.unnamed[1] ~> c9n_c ~> cell_sense_inputs[7].p.line
 
     # --- Package Connections ---
     asic_vp.hv ~ package.Vpos
@@ -341,7 +332,7 @@ module ADI_ADBMS6830:
     cell_balance_inputs[15].p.line ~ package.S16P
 
     # Cell input filters
-    cell_input_filters = new ADBMS6830InputFilters<number_of_cells=16,sense_filter_resistance_ohms=200,sense_filter_capacitance_nF=10,max_balance_current_mA=100,total_number_of_channels=16>
+    cell_input_filters = new ADBMS6830InputFilters
 
     #TODO: zip connect when zip available
     # cell_input_filters.cell_inputs ~ cell_stack
@@ -448,26 +439,6 @@ module ADI_ADBMS6830:
     cell_sense_inputs[14].p.line.override_net_name = "C15"
     cell_sense_inputs[15].p.line.override_net_name = "C16"
 
-#     temp_sensor_1 = new TempSensor
-#     temp_sensor_1.power.vcc ~ package.VREF1
-#     temp_sensor_1.power.gnd ~ package.Vneg
-#     temp_sensor_1.output.io ~ package.GPIO1
-
-#     temp_sensor_2 = new TempSensor
-#     temp_sensor_2.power.vcc ~ package.VREF1
-#     temp_sensor_2.output.io ~ package.GPIO2
-#     temp_sensor_2.power.gnd ~ package.Vneg
-
-
-# module TempSensor from ResistorVoltageDivider:
-#     # 100kΩ 100uA 100mW ±1% 4250K ±1% 0402 NTC Thermistors ROHS
-#     r_top.mpn = "C77130"
-#     r_top.footprint = "R0402"
-#     r_top.value = 100kohm +/- 1%
-#     r_bottom.value = 100kohm +/- 1%
-#     r_bottom.footprint = "R0402"
-
-
 module Diodes_Incorporated_FZT853TA from BJT:
     package = new Diodes_Incorporated_FZT853TA_package
 
@@ -478,9 +449,9 @@ module Diodes_Incorporated_FZT853TA from BJT:
     doping_type = "NPN"
 
 
-    # # component BLM15HD182SN1D
-    # mpn = "C76888"
-component BLM15HD182SN1D from Inductor:
-    lcsc_id = "C76888"
-    unnamed[0] ~ pin 1
-    unnamed[1] ~ pin 2
+module BLM15HD182SN1D:
+    unnamed = new Electrical[2]
+    trait can_bridge_by_name<input_name = "unnamed[0]", output_name = "unnamed[1]">
+    package = new Murata_Electronics_BLM15HD182SN1D_package
+    unnamed[0] ~ package.1
+    unnamed[1] ~ package.2

packages/adi-adbms6830/ato.yaml

@@ -1,4 +1,4 @@
-requires-atopile: ^0.10.8
+requires-atopile: ^0.14.0
 
 paths:
   src: ./
@@ -13,10 +13,6 @@ builds:
     entry: usage.ato:Usage
     hide_designators: true
     exclude_checks: [PCB.requires_drc_check]
-  # input-filters:
-  #   entry: input-filters.py:ADBMS6830InputFilters
-  #   hide_designators: true
-  #   exclude_checks: [PCB.requires_drc_check]
   stackable-bmb-interface:
     entry: usage.ato:StackableBMBInterface
     hide_designators: true
@@ -25,23 +21,23 @@ builds:
 package:
   identifier: atopile/adi-adbms6830
   repository: https://github.com/atopile/packages
-  homepage: https://github.com/atopile/packages/blob/main/packages/adi-adbms6830/README.md
-  version: 0.1.3
+  homepage:
+    https://github.com/atopile/packages/blob/main/packages/adi-adbms6830/README.md
+  version: 0.2.0
   authors:
-    - name: atopile
-      email: hi@atopile.io
-  summary:
-    "Tags: battery; bms; battery monitoring; battery management; adbms6830;
-    analog devices"
+  - name: atopile
+    email: hi@atopile.io
+  summary: 'Tags: battery; bms; battery monitoring; battery management; adbms6830;
+    analog devices'
   license: MIT
 
 dependencies:
-  - type: registry
-    identifier: atopile/logos
-    release: 0.1.4
-  - type: registry
-    identifier: atopile/indicator-leds
-    release: 0.1.5
-  - type: registry
-    identifier: atopile/ti-ts5a22362
-    release: 0.1.0
+- type: registry
+  identifier: atopile/logos
+  release: 0.2.0
+- type: registry
+  identifier: atopile/indicator-leds
+  release: 0.2.3
+- type: registry
+  identifier: atopile/ti-ts5a22362
+  release: 0.2.1