pwm: spacemit: Add Support for K3 SoC#319
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28568906381 参数解析结果
测试完成 详细结果:
Kunit Test Result[06:03:36] Testing complete. Ran 482 tests: passed: 465, skipped: 17
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28574464496 参数解析结果
测试完成 详细结果:
Kunit Test Result[07:59:06] Testing complete. Ran 482 tests: passed: 465, skipped: 17
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你需要在 commit 中提供签名，请参考其他已经合入 RVCK 的，来自于 upstream 的补丁。且签名时最好提供厂家的邮箱信息以方便我们分类。谢谢。 |
你好，来自upstream 的补丁都保留了原有签名 |
我是说要在最下面加上你的签名，请再次看一下别人是怎么写的。 |
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28580383371 参数解析结果
测试完成 详细结果:
Kunit Test Result[09:42:36] Testing complete. Ran 482 tests: passed: 465, skipped: 17
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result: Lava check done!
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2nd review: 有关 commit messag 的格式还是需要你修正一下。具体以 “dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support” 这个为例： 已知这个 patch 参考了上游的 e7abbff 原 commit 的 message 是这样的（不包含 title，即 "dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support"）： 那么你提交时需要做的就是在上面加上 backport 的说明，然后在最下面加上你的签名，例子如下： 你现有的写法主要存在两个问题：
其他 commit 请也一并检查并改正，谢谢 |
非常感谢您的耐心审核和悉心指导！我将补全丢失的签名和message每行字符的长度。 |
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28632772804 参数解析结果
测试完成 详细结果:
Kunit Test Result[01:43:34] Testing complete. Ran 482 tests: passed: 465, skipped: 17
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3rd review:
对于 Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml 从 6.6 到 最新的 master 实际上经历了一个相对独立和渐进的修改过程，你这里 pick 的 e7abbff 实际上只包含了针对这个文件的最后一个 commit 的修改。
为了完整地反映 6.6 到 最新 master 的修改，我建议将针对这个文件的 4 个 commit 修改历史完整地纳入这个 PR，而不是合并成一个 commit 合入。一共有四个：
$ git log --oneline Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml
e7abbff5e8b2 dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support
08e0b981231f dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K1 PWM support
b3d8d1205104 dt-bindings: pwm: marvell,pxa: Do not require pwm-cells twice
bdc585f987a0 dt-bindings: pxa-pwm: Convert to YAMLcherry pick 这四个 commit 会帮助我们更好地维护和理解 6.6 与 master 的发展关系（譬如当我们增加 marvell,pxa-pwm.yaml 时，对应的 pxa-pwm.txt 应该删除，但这个改动在你的 commit 中没有体现出来，而 严格按照修改历史cherry-pick，上游的 bdc585f 实际上是有所反映的）。注意在每个 cherry-pick 中都要加上 backport 的说明以及你的签名。
binding 的修改相对独立，所以我理解可以这么做，k1 的部分这里先加进来也不会对编译啥的有影响。
| struct pxa_pwm_chip *pc; | ||
| struct clk *bus_clk; | ||
| struct device *dev = &pdev->dev; | ||
| struct reset_control *rst; |
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rst 变量在这个 commit 中还用不到，应该是放在 ”pwm: pxa: Adapt SpacemiT K3 PWM support“ 中加入。
请在提交前用内核的 checkpatch 脚本加上 --strict 选项检查一下先，确保 0 error 0 warning
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我看上游主线中针对 K3 的 pwm 支持已经有了一个 commit
844c291 ”riscv: dts: spacemit: k3: Add pwm support“， 请检查是否可以 backport 这个。
另外你这里加的 pwm 节点有几个问题
- compatible 写成了 k1 的，应该是 k3 的
- clocks 节点的格式和上游主线不一致，请在检查上面提到的是否可以 backport 的问题中一并改正。
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844c291 中 k3-pinctrl.dtsi 中的 pwm 相关改动是否也要 pick 一下？
mainline inclusion from mainline-v6.9-rc1 commit bdc585f ("dt-bindings: pxa-pwm: Convert to YAML") category: feature bugzilla: RVCK-Project#317 -------------------------------- Convert the PXA PWM binding file from TXT to YAML. The original binding does not mention any clocks, but the PWM controller will not probe without a clock. Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240107-pxa-pwm-yaml-v3-1-92ac90911c3f@skole.hr Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
mainline inclusion from mainline-v6.10-rc1 commit b3d8d12 ("dt-bindings: pwm: marvell,pxa: Do not require pwm-cells twice") category: feature bugzilla: RVCK-Project#317 -------------------------------- pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/06765e0dd9a842dc51ff9c9cea93f26b8792e44b.1714450308.git.zhoubinbin@loongson.cn Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
mainline inclusion from mainline-v6.17-rc1 commit 08e0b98 ("dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K1 PWM support") category: feature bugzilla: RVCK-Project#317 -------------------------------- The SpacemiT K1 SoC reuses the Marvell PXA910-compatible PWM controller with one notable difference: the addition of a resets property. To make the device tree pass schema validation (make dtbs_check W=3), this patch updates the binding to accept spacemit,k1-pwm as a compatible string, when used in conjunction with the fallback marvell,pxa910-pwm. Support for the optional resets property is also added, as it is required by the K1 integration but was not present in the original Marvell bindings. Since the PWM reset line may be deasserted during the early bootloader stage, making the resets property optional avoids potential double-deassertion, which could otherwise cause flickering on displays that use PWM for backlight control. Additionally, this patch adjusts the required value of the #pwm-cells property for the new compatible string: - For "spacemit,k1-pwm", #pwm-cells must be set to 3. - For existing Marvell compatibles, #pwm-cells remains 1. Background of #pwm-cells change is by an ongoing community discussion about increasing the #pwm-cells value from 1 to 3 for all Marvell PXA PWM devices. These devices are currently the only ones whose bindings do not pass the line index as the first argument. See [1] for further details. [1] https://lore.kernel.org/all/cover.1738842938.git.u.kleine-koenig@baylibre.com/ Reviewed-by: Rob Herring (Arm) <robh@kernel.org> # v2 Signed-off-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250429085048.1310409-2-guodong@riscstar.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
mainline inclusion from mainline-v7.2-rc1 commit e7abbff category: feature bugzilla: RVCK-Project#317 -------------------------------- The PWM controller in SpacemiT K3 SoC reuse the same IP as previous K1 generation, while the difference is that one additional bus clock is added. Signed-off-by: Yixun Lan <dlan@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260428-03-k3-pwm-drv-v2-1-a532bbe45556@kernel.org Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
mainline inclusion from mainline-7.2-rc1 commit 74bca0f category: feature bugzilla: RVCK-Project#317 -------------------------------- Add one secondary optional bus clock for the PWM PXA driver, also keep it compatible with old single clock. The SpacemiT K3 SoC require a bus clock for PWM controller, acquire and enable it during probe phase. Signed-off-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260428-03-k3-pwm-drv-v2-2-a532bbe45556@kernel.org Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
rvck inclusion category: feature bugzilla: RVCK-Project#317 -------------------------------- This commit adapts the upstream SpacemiT K3 PWM backport to make it compile and work correctly on our older v6.6 kernel base. Since the upstream patches are based on a newer kernel tree (v7.2), applying them directly caused context conflicts and API mismatches. This commit resolves those issues to ensure a clean build. Adaptation details: - Adjusted the clock and reset control initialization sequences to match the v6.6 driver structure. - Removed dependencies on v7.2 specific macros and structures that do not exist in our tree. - Manually resolved conflicts in drivers/pwm/pwm-pxa.c due to differences in the original file layout. Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28779573656 参数解析结果
测试完成 详细结果:
Kunit Test Result[08:57:33] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
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mainline inclusion from mainline-7.2-rc1 commit 844c291 category: feature bugzilla: RVCK-Project#317 -------------------------------- Populate all pwm device tree nodes for SpacemiT K3 SoC, also documents the pinctrl info which would easily help to enable them in future. Link: https://lore.kernel.org/all/20260521-04-k3-pwm-dts-v4-1-04d4de0f2fc8@kernel.org Signed-off-by: Yixun Lan <dlan@kernel.org> Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28786716291 参数解析结果
测试完成 详细结果:
Kunit Test Result[11:04:55] Testing complete. Ran 482 tests: passed: 465, skipped: 17
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
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参考 #321 (comment), 我建议的 Adapt 处理是要尽量 follow 主线的 commit 处理，而不是一步到位。
我大致看了一下，看上去 commit 的修改历史稍微有些复杂，有些 commit 不是只改了这一个 pwm-pxa.c 的文件，你看看好不好弄，具体欢迎讨论。
…IO SPTE commit aad885e upstream. When installing an emulated MMIO SPTE, do so *after* dropping/zapping the existing SPTE (if it's shadow-present). While commit a54aa15 was right about it being impossible to convert a shadow-present SPTE to an MMIO SPTE due to a _guest_ write, it failed to account for writes to guest memory that are outside the scope of KVM. E.g. if host userspace modifies a shadowed gPTE to switch from a memslot to emulted MMIO and then the guest hits a relevant page fault, KVM will install the MMIO SPTE without first zapping the shadow-present SPTE. ------------[ cut here ]------------ is_shadow_present_pte(*sptep) WARNING: arch/x86/kvm/mmu/mmu.c:484 at mark_mmio_spte+0xb2/0xc0 [kvm], CPU#0: vmx_ept_stale_r/4292 Modules linked in: kvm_intel kvm irqbypass CPU: 0 UID: 1000 PID: 4292 Comm: vmx_ept_stale_r Not tainted 7.0.0-rc2-eafebd2d2ab0-sink-vm RVCK-Project#319 PREEMPT Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 0.0.0 02/06/2015 RIP: 0010:mark_mmio_spte+0xb2/0xc0 [kvm] Call Trace: <TASK> mmu_set_spte+0x237/0x440 [kvm] ept_page_fault+0x535/0x7f0 [kvm] kvm_mmu_do_page_fault+0xee/0x1f0 [kvm] kvm_mmu_page_fault+0x8d/0x620 [kvm] vmx_handle_exit+0x18c/0x5a0 [kvm_intel] kvm_arch_vcpu_ioctl_run+0xc55/0x1c20 [kvm] kvm_vcpu_ioctl+0x2d5/0x980 [kvm] __x64_sys_ioctl+0x8a/0xd0 do_syscall_64+0xb5/0x730 entry_SYSCALL_64_after_hwframe+0x4b/0x53 RIP: 0033:0x47fa3f </TASK> ---[ end trace 0000000000000000 ]--- Reported-by: Alexander Bulekov <bkov@amazon.com> Debugged-by: Alexander Bulekov <bkov@amazon.com> Suggested-by: Fred Griffoul <fgriffo@amazon.co.uk> Fixes: a54aa15 ("KVM: x86/mmu: Handle MMIO SPTEs directly in mmu_set_spte()") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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fixed: #317
Description
Introduces PWM controller support for the SpacemiT K3 SoC.
The implementation is based on the upstream patches for the
pxa_pwmdriver. Due to significant context differences and API changes between upstream (v7.x) and our current tree (v6.6).Therefore, this PR separates the upstream logic into clean, logical commits, with a dedicated adaptation commit to ensure a clean build and functional correctness on v6.6.