RISC-V SBI debug console extension support#88

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uestc-gr wants to merge 519 commits into

RVCK-Project:OLK-6.6from

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Commits on Jun 5, 2025

drm/etnaviv: add handle for GPUs with only SECURITY_AHB flag

Icenowy
authored and
xmzzz
committed
drm/etnaviv: add workaround for GC620 on TH1520 (0x5552)

Icenowy
authored and
xmzzz
committed
drm/etnaviv: add hwdb entry for TH1520 GC620

Icenowy
authored and
xmzzz
committed
drm/etnaviv: add GC620

Icenowy
authored and
xmzzz
committed
drm/etnaviv: hack: use only pta id 0

Icenowy
authored and
xmzzz
committed
th1520: use etnaviv gpu

Icenowy
authored and
xmzzz
committed
drm/dc8200: disable gamma lut now

Icenowy
authored and
xmzzz
committed
th1520: drm: Fix panel-jadard-jd9365da panel driver problem

RevySR
authored and
xmzzz
committed
th1520: drm: Fix panel-jadard-jd9365da panel driver

RevySR
authored and
xmzzz
committed
drm: verisilicon: fix fbcon

Icenowy
authored and
xmzzz
committed
drm/verisilicon: fix cursor position

Icenowy
authored and
xmzzz
committed
drm/verisilicon: finally fix the cursor position

Icenowy
authored and
xmzzz
committed
drm/verisilicon: bias fb address for dual-head offset

Icenowy
authored and
xmzzz
committed
drm/verisilicon: add format_mod_supported to plane

Icenowy
authored and
xmzzz
committed
dts: lpi4a: remove mipi screen

RevySR
authored and
xmzzz
committed
config: Update openeuler_defconfig
xmzzz
committed
riscv: Add ACLINT SSWI support

guoren83
authored and
xmzzz
committed
mmc: sdhci-of-dwcmshc: Prevent stale command interrupt handling

Michal Wilczynski
authored and
xmzzz
committed
config: Update openeuler_defconfig DRM_ETNAVIV and AIC_FW_PATH
xmzzz
committed
config: Disable video_memory module until the bug is resolved
xmzzz
committed
th1520: Fix Makefile for vc8000d vc8000e tracepoints
xmzzz
committed
th1520: Fix Makefile for npu build error
xmzzz
committed
th1520: Fixed compilation errors reported by clang
xmzzz
committed
sg2042: fix KUnit Error: unrecognized opcode cbo.clean (a0)

woqidaideshi
authored and
xmzzz
committed
genirq/irqdomain: Remove the param count restriction from select()

KAGA-KOKO
authored and
xmzzz
committed
genirq/msi: Extend msi_parent_ops

KAGA-KOKO
authored and
xmzzz
committed
genirq/irqdomain: Add DOMAIN_BUS_DEVICE_MSI

KAGA-KOKO
authored and
xmzzz
committed
platform-msi: Prepare for real per device domains

KAGA-KOKO
authored and
xmzzz
committed
irqchip: Convert all platform MSI users to the new API

KAGA-KOKO
authored and
xmzzz
committed
platform-msi: Remove unused interfaces

KAGA-KOKO
authored and
xmzzz
committed
genirq/msi: Provide optional translation op

KAGA-KOKO
authored and
xmzzz
committed
genirq/irqdomain: Don't call ops->select for DOMAIN_BUS_ANY tokens

Marc Zyngier
authored and
xmzzz
committed
genirq/msi: Split msi_domain_alloc_irq_at()

KAGA-KOKO
authored and
xmzzz
committed
genirq/msi: Provide DOMAIN_BUS_WIRED_TO_MSI

KAGA-KOKO
authored and
xmzzz
committed
genirq/msi: Optionally use dev->fwnode for device domain

KAGA-KOKO
authored and
xmzzz
committed
genirq/msi: Provide allocation/free functions for "wired" MSI interrupts

KAGA-KOKO
authored and
xmzzz
committed
genirq/irqdomain: Reroute device MSI create_mapping

KAGA-KOKO
authored and
xmzzz
committed
genirq/msi: Provide MSI_FLAG_PARENT_PM_DEV

KAGA-KOKO
authored and
xmzzz
committed
RISC-V: Detect Smstateen extension

mdchitale
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xmzzz
committed
dt-bindings: riscv: Add smstateen entry

mdchitale
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xmzzz
committed
mm: add statistics for PUD level pagetable

Baolin Wang
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xmzzz
committed
riscv: tlb: fix __p*d_free_tlb()

xhackerustc
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xmzzz
committed
riscv: tlb: convert __p*d_free_tlb() to inline functions

xhackerustc
authored and
xmzzz
committed
riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && MMU

xhackerustc
authored and
xmzzz
committed
riscv: enable HAVE_FAST_GUP if MMU

xhackerustc
authored and
xmzzz
committed
irqchip/riscv-intc: Add support for RISC-V AIA

avpatel
authored and
xmzzz
committed
irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA

avpatel
authored and
xmzzz
committed
irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32

SiFiveHolland
authored and
xmzzz
committed
genirq/matrix: Dynamic bitmap allocation

bjorn-rivos
authored and
xmzzz
committed
dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller

avpatel
authored and
xmzzz
committed
irqchip: Add RISC-V incoming MSI controller early driver

avpatel
authored and
xmzzz
committed
irqchip/riscv-imsic: Add device MSI domain support for platform devices

avpatel
authored and
xmzzz
committed
irqchip/riscv-imsic: Fix boot time update effective affinity warning

avpatel
authored and
xmzzz
committed
irqchip/riscv-imsic: Fix output text of base address

Andrew Jones
authored and
xmzzz
committed
irqchip/riscv-imsic: Add device MSI domain support for PCI devices

avpatel
authored and
xmzzz
committed
dt-bindings: interrupt-controller: Add RISC-V advanced PLIC

avpatel
authored and
xmzzz
committed
irqchip: Add RISC-V advanced PLIC driver for direct-mode

avpatel
authored and
xmzzz
committed
irqchip/riscv-aplic: Fix an IS_ERR() vs NULL bug in probe()

Dan Carpenter
authored and
xmzzz
committed
irqchip/riscv-aplic: Add support for MSI-mode

avpatel
authored and
xmzzz
committed
cpumask: Introduce cpumask_first_and_and()

Dawei Li
authored and
xmzzz
committed
irqchip/riscv-aplic-direct: Avoid explicit cpumask allocation on stack

Dawei Li
authored and
xmzzz
committed
irqchip/riscv-aplic: Simplify the initialization code

ruanjinjie-eng
authored and
xmzzz
committed
irqchip/riscv-aplic: Retrigger MSI interrupt on source configuration

yong-xuan
authored and
xmzzz
committed
irqchip/riscv-aplic: Prevent crash when MSI domain is missing

SiFiveHolland
authored and
xmzzz
committed
RISC-V: Select APLIC and IMSIC drivers

avpatel
authored and
xmzzz
committed
MAINTAINERS: Add entry for RISC-V AIA drivers

avpatel
authored and
xmzzz
committed
kconfig: fix kernel-mode FPU support
xmzzz
committed
sg2042: riscv: dts: Add cache info for SG2042
xmzzz
committed
riscv: config: enable zstd-compressed firmware support

woqidaideshi
authored and
xmzzz
committed
riscv: Kconfig: Enable amdkfd driver config
xmzzz
committed
riscv: config: Update openeuler_defconfig for ROCm
xmzzz
committed
riscv: k1x: add spacemit k1 soc support

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dt-bindings: add clock dt-bindings for spacemit k1

zhangmeng
authored and
xmzzz
committed
driver: k1x: clk: add clock driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dts: add clock support for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: config: enable clock driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dt-bindings: add reset dt-bindings for spacemit k1

zhangmeng
authored and
xmzzz
committed
driver: k1x: add reset driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dts: add reset support for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: config: enable reset driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dt-bindings: support pinctrl binding for spacemit k1x soc

zhangmeng
authored and
xmzzz
committed
driver: k1x: add pinctrl driver for spacemit k1x

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dts: add pinctrl support for spacemit k1x soc

zhangmeng
authored and
xmzzz
committed
riscv: k1x: config: enable pinctrl driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
driver: k1x: add gpio driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dts: add gpio support spacemit k1x soc

zhangmeng
authored and
xmzzz
committed
riscv: k1x: config: enable gpio driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
driver: k1x: add uart serial driver support for spacemit k1x

zhangmeng
authored and
xmzzz
committed
riscv: k1x: dts: add uart support for spacemit k1x soc

zhangmeng
authored and
xmzzz
committed
riscv: config: enable serial driver for spacemit k1

zhangmeng
authored and
xmzzz
committed
riscv: config: Enable Spacemit k1 support

zhangmeng
authored and
xmzzz
committed
RISC-V: KVM: Share APLIC and IMSIC defines with irqchip drivers

avpatel
authored and
xmzzz
committed
RISC-V: KVM: Use IMSIC guest files when available

avpatel
authored and
xmzzz
committed
RISC-V: Remove unnecessary include from compat.h

woqidaideshi
authored and
xmzzz
committed
RISC-V: Detect Zicond from ISA string

avpatel
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zbc

clementleger
authored and
xmzzz
committed
RISC-V: Enable cbo.zero in usermode

Andrew Jones
authored and
xmzzz
committed
riscv: Rearrange hwcap.h and cpufeature.h

XiaoWang1772
authored and
xmzzz
committed
RISC-V: clarify the QEMU workaround in ISA parser

a4lg
authored and
xmzzz
committed
riscv: annotate check_unaligned_access_boot_cpu() with __init

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for scalar crypto

evangreen
authored and
xmzzz
committed
riscv: add ISA extension parsing for vector crypto

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zfh/Zfh[min]

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zihintntl

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zvfh[min]

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zfa

clementleger
authored and
xmzzz
committed
RISC-V: Remove the removed single-letter extensions

palmer-dabbelt
authored and
xmzzz
committed
riscv: add ISA extension parsing for Ztso

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zacas

clementleger
authored and
xmzzz
committed
riscv: Fix enabling cbo.zero when running in M-mode

SiFiveHolland
authored and
xmzzz
committed
riscv: Add a custom ISA extension for the [ms]envcfg CSR

SiFiveHolland
authored and
xmzzz
committed
riscv: cpufeature: Fix extension subset checking

charlie-rivos
authored and
xmzzz
committed
riscv: vector: add a comment when calling riscv_setup_vsize()

AndybnACT
authored and
xmzzz
committed
riscv: cpufeature: call match_isa_ext() for single-letter extensions

AndybnACT
authored and
xmzzz
committed
perf: RISC-V: Eliminate redundant interrupt enable/disable operations

lyctw
authored and
xmzzz
committed
perf: RISC-V: Introduce Andes PMU to support perf event sampling

lyctw
authored and
xmzzz
committed
riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection

AndybnACT
authored and
xmzzz
committed
riscv: vector: adjust minimum Vector requirement to ZVE32X

AndybnACT
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zimop

clementleger
authored and
xmzzz
committed
riscv: add ISA extensions validation callback

clementleger
authored and
xmzzz
committed
riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb

clementleger
authored and
xmzzz
committed
riscv: add ISA extension parsing for Zcmop

clementleger
authored and
xmzzz
committed
riscv/barrier: Define RISCV_FULL_BARRIER

ericchancf
authored and
xmzzz
committed
riscv/barrier: Consolidate fence definitions

ericchancf
authored and
xmzzz
committed
riscv/cmpxchg: Deduplicate xchg() asm functions

Leonardo Bras
authored and
xmzzz
committed
riscv/cmpxchg: Deduplicate cmpxchg() asm and macros

Leonardo Bras
authored and
xmzzz
committed
riscv/cmpxchg: Implement cmpxchg for variables of size 1 and 2

Leonardo Bras
authored and
xmzzz
committed
riscv/cmpxchg: Implement xchg for variables of size 1 and 2

Leonardo Bras
authored and
xmzzz
committed
riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release}

xhackerustc
authored and
xmzzz
committed
riscv: Fix fully ordered LR/SC xchg[8|16]() implementations

Alexandre Ghiti
authored and
xmzzz
committed
riscv: Add Zawrs support for spinlocks

cmuellner
authored and
xmzzz
committed
riscv: Provide a definition for 'pause'

Andrew Jones
authored and
xmzzz
committed
riscv: Extend cpufeature.c to detect vendor extensions

charlie-rivos
authored and
xmzzz
committed
riscv: cpufeature: Do not drop Linux-internal extensions

SiFiveHolland
authored and
xmzzz
committed
riscv: Add ISA extension parsing for Svvptc

Alexandre Ghiti
authored and
xmzzz
committed
riscv: Save/restore envcfg CSR during CPU suspend

SiFiveHolland
authored and
xmzzz
committed
cpuidle: RISC-V: Move few functions to arch/riscv

vlsunil
authored and
xmzzz
committed
riscv: Do not save the scratch CSR during suspend

SiFiveHolland
authored and
xmzzz
committed
riscv: Enable cbo.zero only when all harts support Zicboz

SiFiveHolland
authored and
xmzzz
committed
riscv: Call riscv_user_isa_enable() only on the boot hart

SiFiveHolland
authored and
xmzzz
committed
riscv: Add ISA extension parsing for pointer masking

SiFiveHolland
authored and
xmzzz
committed
riscv: Do not fail to build on byte/halfword operations with Zawrs

Alexandre Ghiti
authored and
xmzzz
committed
riscv: Implement cmpxchg32/64() using Zacas

Alexandre Ghiti
authored and
xmzzz
committed
riscv: Implement cmpxchg8/16() using Zabha

Alexandre Ghiti
authored and
xmzzz
committed
riscv: Add ISA extension parsing for Ziccrse

Alexandre Ghiti
authored and
xmzzz
committed
RISC-V: Add Svade and Svadu Extensions Support

yong-xuan
authored and
xmzzz
committed
RISC-V: hwprobe: Expose Zicboz extension and its block size

Andrew Jones
authored and
xmzzz
committed
docs: move riscv under arch

makelinux
authored and
xmzzz
committed
riscv: hwprobe: export missing Zbc ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: add support for scalar crypto ISA extensions

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export vector crypto ISA extensions

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zfh[min] ISA extensions

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zhintntl ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zvfh[min] ISA extensions

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zfa ISA extension

clementleger
authored and
xmzzz
committed
RISC-V: selftests: Statically link hwprobe test

Andrew Jones
authored and
xmzzz
committed
RISC-V: selftests: Convert hwprobe test to kselftest API

Andrew Jones
authored and
xmzzz
committed
RISC-V: selftests: Add CBO tests

Andrew Jones
authored and
xmzzz
committed
RISC-V: hwprobe: Clarify cpus size parameter

Andrew Jones
authored and
xmzzz
committed
RISC-V: hwprobe: Introduce which-cpus flag

Andrew Jones
authored and
xmzzz
committed
riscv: hwprobe: export Ztso ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zacas ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zicond extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN

clementleger
authored and
xmzzz
committed
RISC-V: Move the hwprobe syscall to its own file

Andrew Jones
authored and
xmzzz
committed
riscv: hwprobe: export Zihintpause ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: add zve Vector subextensions into hwprobe interface

AndybnACT
authored and
xmzzz
committed
riscv: hwprobe: export Zimop ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zcmop ISA extension

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export highest virtual userspace address

clementleger
authored and
xmzzz
committed
riscv: hwprobe: export Zawrs ISA extension

Andrew Jones
authored and
xmzzz
committed
RISC-V: Provide the frequency of time CSR via hwprobe

palmer-dabbelt
authored and
xmzzz
committed
riscv: hwprobe: Export the Supm ISA extension

SiFiveHolland
authored and
xmzzz
committed
RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabetically

ConchuOD
authored and
xmzzz
committed
riscv: Introduce vendor variants of extension helpers

charlie-rivos
authored and
xmzzz
committed
riscv: cpufeature: Extract common elements from extension checking

charlie-rivos
authored and
xmzzz
committed
riscv: Move cpufeature.h macros into their own header

Alexandre Ghiti
authored and
xmzzz
committed
riscv: errata: Rename defines for Andes

lyctw
authored and
xmzzz
committed
ACPICA: SRAT: Add RISC-V RINTC affinity structure

uestc-gr
authored and
xmzzz
committed
ACPI: RISCV: Add NUMA support based on SRAT and SLIT

uestc-gr
authored and
xmzzz
committed
ACPI: NUMA: Add handler for SRAT RINTC affinity structure

uestc-gr
authored and
xmzzz
committed
ACPI: NUMA: Make some NUMA-related functions available for RISC-V

uestc-gr
authored and
xmzzz
committed
ACPI: NUMA: change the ACPI_NUMA to a hidden option

uestc-gr
authored and
xmzzz
committed
ACPI: NUMA: replace pr_info with pr_debug in arch_acpi_numa_init

uestc-gr
authored and
xmzzz
committed

Commits on Jun 7, 2025

irqchip/sifive-plic: Convert PLIC driver into a platform driver

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz()

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Use devm_xyz() for managed allocation

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe()

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore

avpatel
authored and
xmzzz
committed
irqchip/sifive-plic: Avoid explicit cpumask allocation on stack

Dawei Li
authored and
xmzzz
committed
irqchip/sifive-plic: Chain to parent IRQ after handlers are ready

SiFiveHolland
authored and
xmzzz
committed
irqchip/sifive-plic: Probe plic driver early for Allwinner D1 platform

avpatel
authored and
xmzzz
committed
arm64: PCI: Migrate ACPI related functions to pci-acpi.c

vlsunil
authored and
xmzzz
committed
ACPI: scan: Add a weak arch_sort_irqchip_probe() to order the IRQCHIP probe

vlsunil
authored and
xmzzz
committed
ACPI: bus: Add acpi_riscv_init() function

vlsunil
authored and
xmzzz
committed
ACPI: scan: Extract CSI-2 connection graph from _CRS

rafaeljw
authored and
xmzzz
committed
ACPI: utils: Dynamically determine acpi_handle_list size

rafaeljw
authored and
xmzzz
committed
ACPI: utils: Fix error path in acpi_evaluate_reference()

rafaeljw
authored and
xmzzz
committed
ACPI: utils: Rearrange in acpi_evaluate_reference()

rafaeljw
authored and
xmzzz
committed
ACPI: utils: Return bool from acpi_evaluate_reference()

rafaeljw
authored and
xmzzz
committed
ACPI: utils: Refine acpi_handle_list_equal() slightly

rafaeljw
authored and
xmzzz
committed
ACPI: utils: Fix white space in struct acpi_handle_list definition

rafaeljw
authored and
xmzzz
committed
ACPI: scan: Refactor dependency creation

vlsunil
authored and
xmzzz
committed
ACPI: scan: Add RISC-V interrupt controllers to honor list

vlsunil
authored and
xmzzz
committed
ACPI: scan: Define weak function to populate dependencies

vlsunil
authored and
xmzzz
committed
ACPI: bus: Add RINTC IRQ model for RISC-V

vlsunil
authored and
xmzzz
committed
ACPI: pci_link: Clear the dependencies after probe

vlsunil
authored and
xmzzz
committed
ACPI: RISC-V: Implement PCI related functionality

vlsunil
authored and
xmzzz
committed
ACPI: RISC-V: Implement function to reorder irqchip probe entries

vlsunil
authored and
xmzzz
committed
ACPI: RISC-V: Initialize GSI mapping structures

vlsunil
authored and
xmzzz
committed
ACPI: RISC-V: Implement function to add implicit dependencies

vlsunil
authored and
xmzzz
committed
irqchip/riscv-intc: Add ACPI support for AIA

vlsunil
authored and
xmzzz
committed
irqchip/riscv-imsic-state: Create separate function for DT

vlsunil
authored and
xmzzz
committed
irqchip/riscv-imsic: Add ACPI support

vlsunil
authored and
xmzzz
committed
irqchip/riscv-aplic: Add ACPI support

vlsunil
authored and
xmzzz
committed
irqchip/sifive-plic: Add ACPI support

vlsunil
authored and
xmzzz
committed
irqchip/riscv-intc: Fix SMP=n boot with ACPI

vlsunil
authored and
xmzzz
committed

Commits on Jun 13, 2025

clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu

vlsunil
authored and
xmzzz
committed
RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping

vlsunil
authored and
xmzzz
committed
RISC-V: ACPI: Update the return value of acpi_get_rhct()

vlsunil
authored and
xmzzz
committed
RISC-V: ACPI: RHCT: Add function to get CBO block sizes

vlsunil
authored and
xmzzz
committed
RISC-V: cacheflush: Initialize CBO variables on ACPI systems

vlsunil
authored and
xmzzz
committed

Commits on Jun 15, 2025

driver: k1: add an interconnect process driver

zhangmeng
authored and
xmzzz
committed
riscv: k1: dts: add memory ranges define

zhangmeng
authored and
xmzzz
committed
riscv: config: enable memory range driver for spacemit k1

zhangmeng
authored and
xmzzz
committed

Commits on Jun 19, 2025

riscv: dmi: Add SMBIOS/DMI support

uestc-gr
authored and
xmzzz
committed

Commits on Jun 23, 2025

serial/8250_dw: Add ACPI ID for SG2044 UART

haijiao.liu
authored and
xmzzz
committed
irqchip: Add Sophgo SG2044 MSI controller driver

haijiao.liu
authored and
xmzzz
committed
riscv: openeuler_defconfig: Enable Sophgo SG2044 MSI drivers

haijiao.liu
authored and
xmzzz
committed
drivers: i2c: Add ACPI support for Sophgo I2C Controller

haijiao.liu
authored and
xmzzz
committed
drivers: spi: Add ACPI support for Sophgo SPI Controller

haijiao.liu
authored and
xmzzz
committed
ACPI: RISC-V: Add LPI driver

vlsunil
authored and
xmzzz
committed
ACPI: Enable ACPI_PROCESSOR for RISC-V

vlsunil
authored and
xmzzz
committed
lib/string_choices: Add str_plural() helper

mwajdecz
authored and
xmzzz
committed
dt-bindings: interrupt-controller: Add T-HEAD C900 ACLINT SSWI device

inochisa
authored and
xmzzz
committed
irqchip: Add T-HEAD C900 ACLINT SSWI driver

inochisa
authored and
xmzzz
committed
drivers: Add ACPI support for thead-c900-aclint-sswi

Jingyu Li
authored and
xmzzz
committed
riscv: openeuler_defconfig: Enable T-HEAD C900 ACLINT SSWI drivers

haijiao.liu
authored and
xmzzz
committed

Commits on Jun 27, 2025

RISC-V: Enable IPI CPU Backtrace

uestc-gr
authored and
xmzzz
committed

Commits on Jun 30, 2025

RISC-V: ACPI: Enable SPCR table for console output on RISC-V

uestc-gr
authored and
xmzzz
committed

Commits on Jul 5, 2025