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sync: rvck #316: PERF: Update LRW PMU Event Encoding #245

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40 changes: 20 additions & 20 deletions tools/perf/pmu-events/arch/riscv/lrw/lrw-core/exception.json
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Expand Up @@ -5,39 +5,39 @@
"BriefDescription": "Exception taken"
},
{
"EventName": "EXC_RETURN",
"EventName": "FLUSH_RETURN",
"EventCode": "0x0000020a",
"BriefDescription": "Exception return"
"BriefDescription": "Flush return"
},
{
"EventName": "EXC_UNDEF",
"EventName": "EXC_ILL_INS",
"EventCode": "0x0000040a",
"BriefDescription": "Undefined exception taken locally"
"BriefDescription": "Illegal Instruction exception taken locally"
},
{
"EventName": "EXC_ECALL_U",
"EventCode": "0x0000080a",
"BriefDescription": "User Call exception taken locally"
},
{
"EventName": "EXC_PABORT",
"EventName": "EXC_PA",
"EventCode": "0x0000100a",
"BriefDescription": "Instruction abort exception taken locally"
"BriefDescription": "Instruction exception or debug breakpoint taken locally"
},
{
"EventName": "EXC_DABORT",
"EventName": "EXC_DA",
"EventCode": "0x0000200a",
"BriefDescription": "Data abort or SError taken locally"
"BriefDescription": "Data access or address breakpoint taken locally"
},
{
"EventName": "EXC_IRQ",
"EventName": "EXC_INT_S",
"EventCode": "0x0000400a",
"BriefDescription": "IRQ exception taken locally"
"BriefDescription": "S/VS mode interrupt taken locally"
},
{
"EventName": "EXC_FIQ",
"EventName": "EXC_INT_M",
"EventCode": "0x0000800a",
"BriefDescription": "FIQ exception taken locally"
"BriefDescription": "M mode interrupt taken locally"
},
{
"EventName": "EXC_ECALL_M",
Expand All @@ -50,29 +50,29 @@
"BriefDescription": "S-mode Call exception"
},
{
"EventName": "EXC_TRAP_PABORT",
"EventName": "EXC_TRAP_PA",
"EventCode": "0x0004000a",
"BriefDescription": "Instruction abort exception not taken locally"
"BriefDescription": "Instruction exception or debug breakpoint not taken locally"
},
{
"EventName": "EXC_TRAP_DABORT",
"EventName": "EXC_TRAP_DA",
"EventCode": "0x0008000a",
"BriefDescription": "Data abort or SError not taken locally"
"BriefDescription": "Data access or address breakpoint not taken locally"
},
{
"EventName": "EXC_ECALL_VS",
"EventCode": "0x0010000a",
"BriefDescription": "VS-mode Call exception"
},
{
"EventName": "EXC_TRAP_IRQ",
"EventName": "EXC_TRAP_INT_S",
"EventCode": "0x0020000a",
"BriefDescription": "IRQ exception not taken locally"
"BriefDescription": "S/VS mode interrupt not taken locally"
},
{
"EventName": "EXC_TRAP_FIQ",
"EventName": "EXC_TRAP_INT_M",
"EventCode": "0x0040000a",
"BriefDescription": "FIQ exception not taken locally"
"BriefDescription": "M mode interrupt exception not taken locally"
},
{
"EventName": "FLUSH",
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16 changes: 8 additions & 8 deletions tools/perf/pmu-events/arch/riscv/lrw/lrw-core/l1dcache.json
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Expand Up @@ -22,42 +22,42 @@
{
"EventName": "L1D_CACHE_RD",
"EventCode": "0x00001001",
"BriefDescription": "L1 data cache read"
"BriefDescription": "L1 data cache access, read"
},
{
"EventName": "L1D_CACHE_WR",
"EventCode": "0x00002001",
"BriefDescription": "L1 data cache write"
"BriefDescription": "L1 data cache access, write"
},
{
"EventName": "L1D_CACHE_REFILL_RD",
"EventCode": "0x00004001",
"BriefDescription": "L1 data cache refill read"
"BriefDescription": "L1 data cache refill, read"
},
{
"EventName": "L1D_CACHE_REFILL_WR",
"EventCode": "0x00008001",
"BriefDescription": "L1 data cache refill write"
"BriefDescription": "L1 data cache refill, write"
},
{
"EventName": "L1D_CACHE_REFILL_INNER",
"EventCode": "0x00010001",
"BriefDescription": "L1 data cache refill inner"
"BriefDescription": "L1 data cache refill, inner"
},
{
"EventName": "L1D_CACHE_REFILL_OUTER",
"EventCode": "0x00020001",
"BriefDescription": "L1 data cache refill outer"
"BriefDescription": "L1 data cache refill, outer"
},
{
"EventName": "L1D_CACHE_WB_VICTIM",
"EventCode": "0x00040001",
"BriefDescription": "L1 data cache write-back victim"
"BriefDescription": "L1 data cache write-back, victim"
},
{
"EventName": "L1D_CACHE_WB_CLEAN",
"EventCode": "0x00080001",
"BriefDescription": "L1 data cache write-back clean"
"BriefDescription": "L1 data cache write-back cleaning and coherency"
},
{
"EventName": "L1D_CACHE_INVAL",
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2 changes: 1 addition & 1 deletion tools/perf/pmu-events/arch/riscv/lrw/lrw-core/l2cache.json
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Expand Up @@ -7,7 +7,7 @@
{
"EventName": "L2_CACHE_REFILL",
"EventCode": "0x00000203",
"BriefDescription": "L2cache refill"
"BriefDescription": "L2 cache refill"
},
{
"EventName": "L2_CACHE_WB",
Expand Down
19 changes: 2 additions & 17 deletions tools/perf/pmu-events/arch/riscv/lrw/lrw-core/l3cache.json
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Expand Up @@ -10,23 +10,8 @@
"BriefDescription": "Last level cache access, read"
},
{
"EventName": "L3_CACHE_REFILL",
"EventName": "EXT_DATSRC_CACHE_REFILL",
"EventCode": "0x00000404",
"BriefDescription": "Attributable L3 unified cache refill"
},
{
"EventName": "L3_CACHE_RD",
"EventCode": "0x00000804",
"BriefDescription": "L3 cache read"
},
{
"EventName": "L3_CACHE_ALLOCATE",
"EventCode": "0x00001004",
"BriefDescription": "Attributable L3 data cache allocation without refill"
},
{
"EventName": "L3_CACHE",
"EventCode": "0x00002004",
"BriefDescription": "Attributable Level 3 unified cache access"
"BriefDescription": "External data source cache"
}
]
22 changes: 11 additions & 11 deletions tools/perf/pmu-events/arch/riscv/lrw/lrw-core/ldst.json
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Expand Up @@ -2,27 +2,27 @@
{
"EventName": "UNALIGNED_LD_SPEC",
"EventCode": "0x00000107",
"BriefDescription": "Unaligned load speculation"
"BriefDescription": "Unaligned access, read"
},
{
"EventName": "UNALIGNED_ST_SPEC",
"EventCode": "0x00000207",
"BriefDescription": "Unaligned store speculation"
"BriefDescription": "Unaligned access, write"
},
{
"EventName": "UNALIGNED_LDST_SPEC",
"EventCode": "0x00000407",
"BriefDescription": "Unaligned load/store speculation"
"BriefDescription": "Unaligned access"
},
{
"EventName": "LD_SPEC",
"EventCode": "0x00000807",
"BriefDescription": "Load speculation"
"BriefDescription": "Load instruction speculatively executed"
},
{
"EventName": "ST_SPEC",
"EventCode": "0x00001007",
"BriefDescription": "Store speculation"
"BriefDescription": "Store instruction speculatively executed"
},
{
"EventName": "SFENCE_SPEC",
Expand All @@ -37,12 +37,12 @@
{
"EventName": "RC_LD_SPEC",
"EventCode": "0x00008007",
"BriefDescription": "RC load speculation"
"BriefDescription": "Load-acquire operation speculatively executed"
},
{
"EventName": "RC_ST_SPEC",
"EventCode": "0x00010007",
"BriefDescription": "RC store speculation"
"BriefDescription": "Store-release operation speculatively executed"
},
{
"EventName": "LR_SPEC",
Expand All @@ -52,16 +52,16 @@
{
"EventName": "SC_PASS_SPEC",
"EventCode": "0x00040007",
"BriefDescription": "Successful store-condiitional speculatively executed"
"BriefDescription": "Successful store-conditional speculatively executed"
},
{
"EventName": "SC_FAlL_SPEC",
"EventName": "SC_FAIL_SPEC",
"EventCode": "0x00080007",
"BriefDescription": "Failed store-condiitional speculatively executed"
"BriefDescription": "Failed store-conditional speculatively executed"
},
{
"EventName": "SC_SPEC",
"EventCode": "0x00100007",
"BriefDescription": "Store-condiitional speculatively executed"
"BriefDescription": "Store-conditional speculatively executed"
}
]
22 changes: 11 additions & 11 deletions tools/perf/pmu-events/arch/riscv/lrw/lrw-core/mem.json
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Expand Up @@ -2,7 +2,7 @@
{
"EventName": "MEM_ACCESS",
"EventCode": "0x00000105",
"BriefDescription": "Memory access"
"BriefDescription": "Data memory access"
},
{
"EventName": "BUS_ACCESS",
Expand All @@ -12,12 +12,12 @@
{
"EventName": "MEMORY_ERROR",
"EventCode": "0x00000405",
"BriefDescription": "Memory error"
"BriefDescription": "Local memory error"
},
{
"EventName": "REMOTE_ACCESS",
"EventCode": "0x00000805",
"BriefDescription": "Remote access"
"BriefDescription": "Access to another socket in a multi-socket system"
},
{
"EventName": "BUS_ACCESS_RD",
Expand All @@ -32,27 +32,27 @@
{
"EventName": "MEM_ACCESS_RD",
"EventCode": "0x00004005",
"BriefDescription": "Memory access read"
"BriefDescription": "Data memory access, read"
},
{
"EventName": "MEM_ACCESS_WR",
"EventCode": "0x00008005",
"BriefDescription": "Memory access write"
"BriefDescription": "Data memory access, write"
},
{
"EventName": "LDST_ALIGN_LAT",
"EventCode": "0x00010005",
"BriefDescription": "Load/store align latency"
"BriefDescription": "Access with additional latency from alignment"
},
{
"EventName": "LD_ALIGN_LAT",
"EventCode": "0x00020005",
"BriefDescription": "Load align latency"
"BriefDescription": "Load with additional latency from alignment"
},
{
"EventName": "ST_ALIGN_LAT",
"EventCode": "0x00040005",
"BriefDescription": "Store align latency"
"BriefDescription": "Store with additional latency from alignment"
},
{
"EventName": "BUS_REQUEST_REQ",
Expand Down Expand Up @@ -82,12 +82,12 @@
{
"EventName": "TBW_DESC",
"EventCode": "0x008000005",
"BriefDescription": "Page Table Walk Descriptor"
"BriefDescription": "TBW descriptor"
},
{
"EventName": "S1L2_HIT",
"EventCode": "0x010000005",
"BriefDescription": "Stage1 level 2 page table hit"
"BriefDescription": "Stage 1 level 2 page table hit"
},
{
"EventName": "S1L1_HIT",
Expand Down Expand Up @@ -142,7 +142,7 @@
{
"EventName": "MTT_L3_HIT",
"EventCode": "0x8000000005",
"BriefDescription": "Memory tracking table level 3 hit"
"BriefDescription": "Memory tracking table level 3 hit"
},
{
"EventName": "MTT_L2_HIT",
Expand Down
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