sync: rvck #275: add LRW PCIE PMU support

MAINTAINERS

@@ -12571,6 +12571,12 @@ R:	Qingtao Liu <liu.qingtao2@zte.com.cn>
 S:	Maintained
 F:	drivers/perf/lrw_ddr_pmu.c
 
+LRW PCIE PMU DRIVER
+M:	Wu Guo <guowu1@zte.com.cn>
+R:	Qingtao Liu <liu.qingtao2@zte.com.cn>
+S:	Maintained
+F:	drivers/perf/lrw_pcie_pmu.c
+
 LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
 M:	Sathya Prakash <sathya.prakash@broadcom.com>
 M:	Sreekanth Reddy <sreekanth.reddy@broadcom.com>

arch/riscv/configs/openeuler_defconfig

@@ -7813,6 +7813,7 @@ CONFIG_RISCV_PMU_SBI=y
 # CONFIG_RISCV_PMU_SSE is not set
 CONFIG_ANDES_CUSTOM_PMU=y
 CONFIG_LRW_DDR_PMU=m
+CONFIG_LRW_PCIE_PMU=m
 # end of Performance monitor support
 
 CONFIG_RAS=y

drivers/perf/Kconfig

@@ -294,4 +294,20 @@ config LRW_DDR_PMU
 	  If you are not using LRW DDR hardware or do not require performance monitoring,
 	  say N.
 
+config LRW_PCIE_PMU
+	tristate "Enable LRW PCIe sub-system performance monitoring"
+
+	help
+	  This option enables the PMU driver for the LRW PCIe sub-system, which allows
+	  performance monitoring of PCIe bus operations using the perf framework.
+
+	  Say Y here if you want to include this driver directly in the kernel image,
+	  or M to build it as a module named lrw_pcie_pmu.ko.
+
+	  This driver provides basic counter support for PCIe performance metrics, such as
+	  transaction counts and link throughput. It does not support advanced features
+	  like counter overflow handling or privilege mode filtering.
+
+	  If you are not using LRW PCIe hardware or do not require performance monitoring,
+	  say N.
 endmenu

drivers/perf/Makefile

@@ -28,3 +28,4 @@ obj-$(CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU) += arm_cspmu/
 obj-$(CONFIG_MESON_DDR_PMU) += amlogic/
 obj-$(CONFIG_CXL_PMU) += cxl_pmu.o
 obj-$(CONFIG_LRW_DDR_PMU) += lrw_ddr_pmu.o
+obj-$(CONFIG_LRW_PCIE_PMU) += lrw_pcie_pmu.o