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[None][perf] Use FP8 MiniMax-M3 MSA indexer QK#16742

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peihu-nv merged 1 commit into
NVIDIA:feat/m3_with_msafrom
peihu-nv:peihengh/m3-msa-proxy-decode
Jul 23, 2026
Merged

[None][perf] Use FP8 MiniMax-M3 MSA indexer QK#16742
peihu-nv merged 1 commit into
NVIDIA:feat/m3_with_msafrom
peihu-nv:peihengh/m3-msa-proxy-decode

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@coderabbitai summary

Description

MiniMax-M3 MSA currently produces normalized/RoPE index Q/K in BF16, converts the indexer tensors separately, and launches a separate paged index-K cache write in every sparse layer. This PR adds an opt-in fused CUDA path that performs Gemma RMSNorm, NeoX partial RoPE, BF16 rounding, raw-E4M3 index-Q output, and direct strided-HND index-K insertion in one kernel.

The path is controlled by the prototype indexer_kv_dtype option and keeps bf16 as the default. FP8 is restricted to the MSA implementation with the index-value branch disabled. The existing general MSA max-score FMHA and fused block selector remain unchanged; score accumulation remains FP32.

Matched GB200 disaggregated serving used 1P1D, TP4/EP4 with attention DP, FP8 main KV cache, ISL 8192 / OSL 1024, concurrency 64, and the same 1,000 requests (7,415,543 input and 918,382 output tokens) in both arms:

Phase / metric BF16 indexer This PR Change
GEN/decode median TPOT 22.657 ms 22.296 ms -1.592%
GEN/decode p90 TPOT 22.769 ms 22.449 ms -1.407%
E2E total/output throughput 24,000.465 / 2,644.804 token/s 24,362.696 / 2,684.721 token/s +1.509%

Test Coverage

  • Changed-file pre-commit checks: passed for all 13 files in this PR.
  • GB200 build and link of the new CUDA translation unit and THOP registration: passed (2456310).
  • Focused GB200 correctness: 4/4 native parity and CUDA-graph tests plus 2/2 MSA FP8 integration tests passed (2456315). Outputs had 0/8,192 index-Q byte mismatches, 0/2,048 index-K byte mismatches, and 0/1,024 selected-ID mismatches against the converted-FP8 reference.
  • Isolated B16/KV8K CUDA-graph benchmark: producer time fell from 11.341 to 2.424 us/call; producer + score + selector fell from 46.801 to 33.821 us/call (2456337).
  • Matched MiniMax-M3 NVFP4 TP4/EP4 accuracy A/B: both established gates passed (2456544). BF16/FP8 scored 85.015%/85.063% on MMLU and 90.713%/89.765% on GSM8K.
  • Matched 1P1D concurrency-64 serving A/B: output and total-token throughput improved 1.509%; median TPOT improved 1.592% (2456634, 2456701).
  • Lightweight GEN Nsys: 342 graph nodes removed (6 x 57 sparse layers) and proxy-score time fell from 1.694 to 1.419 ms/replay (-16.21%) (2457008).

PR Checklist

Please review the following before submitting your PR:

  • PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.

  • PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

  • Test cases are provided for new code paths (see test instructions)

  • If PR introduces API changes, an appropriate PR label is added - either api-compatible or api-breaking. For api-breaking, include BREAKING in the PR title.

  • Any new dependencies have been scanned for license and vulnerabilities

  • CODEOWNERS updated if ownership changes

  • Documentation updated as needed

  • Update tava architecture diagram if there is a significant design change in PR.

  • The reviewers assigned automatically/manually are appropriate for the PR.

  • Please check this after reviewing the above items as appropriate for this PR.

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@peihu-nv
peihu-nv requested review from a team as code owners July 22, 2026 15:36
@peihu-nv
peihu-nv requested review from QiJune, arysef, kris1025 and lori-ren and removed request for a team July 22, 2026 15:36
@peihu-nv peihu-nv added the api-compatible Accepted LLM API contract change that is backwards-compatible label Jul 22, 2026
Signed-off-by: peihengh <259410613+peihu-nv@users.noreply.github.com>
@peihu-nv
peihu-nv force-pushed the peihengh/m3-msa-proxy-decode branch from da6f1e6 to 6842ede Compare July 23, 2026 17:34

@brb-nv brb-nv left a comment

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LGTM.

@peihu-nv
peihu-nv merged commit 4c50986 into NVIDIA:feat/m3_with_msa Jul 23, 2026
5 of 6 checks passed
brb-nv pushed a commit to brb-nv/TensorRT-LLM that referenced this pull request Jul 23, 2026
Signed-off-by: peihengh <259410613+peihu-nv@users.noreply.github.com>
Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
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3 participants