Add cos/sin width guard to fused MLA RoPE kernels#5497
Open
ShauryaaSharma wants to merge 1 commit into
Open
Conversation
The fused MLA RoPE kernels read emb_dim cos/sin values per token and assume the cache is emb_dim wide. When the rotary cache is built with rotary_percent < 1, the base RotaryEmbedding shrinks it to int(emb_dim * rotary_percent), which is narrower than emb_dim. The kernel then reads past the buffer, picks up uninitialized GPU memory, and produces NaN gradients. Add an explicit check in both ApplyMLARotaryEmbQ.forward and ApplyMLARotaryEmbKV.forward that the cos/sin last dimension equals emb_dim, turning the silent out-of-bounds read into a clear error. Add CPU-only regression tests for the query and key/value kernels. Related to NVIDIA#5317. Signed-off-by: ShauryaaSharma <shauryasofficial27@gmail.com>
Contributor
|
This PR has been automatically converted to draft because all PRs must start as drafts. When you are ready for review, click Ready for Review to begin the review process. This will:
See the contribution guide for more details. |
svcnvidia-nemo-ci
added
the
waiting-on-maintainers
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
3 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
What does this PR do ?
Add a width guard to the fused MLA RoPE kernels so an undersized cos/sin cache fails with a clear error instead of silently reading out of bounds.
The fused kernels (
ApplyMLARotaryEmbQ/ApplyMLARotaryEmbKV) reademb_dimcos/sin values per token and assume the cache isemb_dimwide. When the rotary cache is built withrotary_percent < 1, the baseRotaryEmbeddingshrinks it toint(emb_dim * rotary_percent), narrower thanemb_dim, and the kernel reads past the buffer, picks up uninitialized GPU memory, and produces NaN gradients. This is reachable onmain:MultiLatentAttentionforwardsrotary_percentinto the baseRotaryEmbeddingforrope_type="rope"(multi_latent_attention.py:184), and the fused branch (:870) calls the kernel regardless of rope type with no width check today (fused_mla_yarn_rope_apply.py:251-255). The guard assertscos.shape[-1] == emb_dim(andsin) in both forward paths, turning a silent ~1e14 out-of-bounds read into an immediate, readable failure.Issue tracking
Linked issue: Related to #5317
This guard makes the failure mode in #5317 loud instead of silent; the root-cause fix for that issue is
rotary_percent = 1.0in the Megatron-Bridge DSv4 config mapping. Independent of #5412, which fixes a separate in-place aliasing bug.Contribution process
Pre-checks