This repository contains the FPGA benchmark flow used to generate the AOIG, MIG, and mMIG results and the paper-ready artifacts for the mMIG study.
The flow has three stages:
- Generate a self-contained benchmark suite under
generated/extension_suite/ - Run the FPGA implementation flow for
AOIG,MIG, andmMIG - Produce paper-ready LaTeX tables, figures, and summary metrics
The implementation flow uses explicit LUT1 inverter realization with dont_touch. No hierarchy-preservation constraint is applied.
Requirements:
- Python 3.10 or newer
- Xilinx Vivado 2024.2 available on
PATH
Install Python dependencies:
pip install -r requirements.txtRun the full flow:
./run_paper_results.shIf you want to run the stages manually:
Generate the benchmark RTL:
python3 scripts/generate_extension_suite.pyRun the FPGA flow:
python3 scripts/run_extension_suite_donttouch.pyGenerate the paper artifacts:
python3 scripts/generate_ieee_tables_figures.py \
--artifact-root artifacts/paper_extension_donttouch \
--output-root artifacts/paper_extension_donttouch/paper_readyAfter a full run, the main outputs are:
generated/extension_suite/artifacts/paper_extension_donttouch/results/raw_metrics.csvartifacts/paper_extension_donttouch/results/ordering_summary.csvartifacts/paper_extension_donttouch/paper_ready/latex/artifacts/paper_extension_donttouch/paper_ready/figures/artifacts/paper_extension_donttouch/paper_ready/metrics/
implementations/- source templates for
AOIG,MIG, andmMIG
- source templates for
scripts/generate_extension_suite.py- generates the benchmark suite RTL
scripts/run_extension_suite_donttouch.py- runs the FPGA flow with explicit
LUT1inverter preservation usingdont_touch
- runs the FPGA flow with explicit
scripts/generate_ieee_tables_figures.py- generates paper-ready LaTeX tables and figures from completed runs
flows/vivado/run_nonproject.tcl- Vivado non-project batch flow
run_paper_results.sh- one-command full regeneration script
For a smaller validation run:
python3 scripts/generate_extension_suite.py
python3 scripts/run_extension_suite_donttouch.py \
--benchmarks ascon_sbox \
--implementations aoig,mig,mmig \
--artifact-root artifacts/paper_extension_donttouch_smoke
python3 scripts/generate_ieee_tables_figures.py \
--artifact-root artifacts/paper_extension_donttouch_smoke \
--output-root artifacts/paper_extension_donttouch_smoke/paper_readyThe generated suite covers:
- adder family
- secondary adders
- multiplier family
- DSP-style datapaths
- ALU / compare blocks
- crypto blocks
- The benchmark suite is generated from the source templates in
implementations/ - The Vivado flow is non-project and batch-driven
- The resulting paper artifacts are written under
artifacts/paper_extension_donttouch/paper_ready/