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[Mlxlink][mstflint] Port CPO code to mstflint for 4.380 - #1764

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[Mlxlink][mstflint] Port CPO code to mstflint for 4.380#1764
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@yairfax yairfax commented Jul 2, 2026

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Port Chameleon features in mlxlink to mstflint

Features

Issue Subject Ported Divergence
4295049 Show module for Taipan
4933546 new PDDR.cable_identifier CPO, OE, ELS Missing SDK bindings
4376222 adding support for 'Production Test Revision' field in show_module + some bug fixes for it
4844832 Taipan — CPO mapping: ELS and OE mapping table
4743743 MFT Debug CPO Indications MLXlink
4640375 [Chameleon] ELS EEPROM R/W from mlxlink ❌ Internal Only Also not porting the plumbing to support (e.g. in MCIA)
4810080 Taipan / MFT Debug — Fiber Check + laser_tuning + laser_wl_tuning support in mlxlink Many changes since then, so not ported verbatim
4810179 Chameleon / MFT Debug — EEPROM ops: SW reset EEPROM, Save_laser_setpoint
4619501 Taipan — show_module additional CPO module info, shown per requested module type
4933470 show_module — Serial Number (over VMDL) and Opt Power Setpoint for OE/ELS
4494965 [mlxlink] Add ELS pages to VMOD dump Internal overrides not copied
4330827 Taipan — Adjust amBER for CPO system (amber 4.7/4.8 CPO fields) Only getModuleLaserInfo needed to be ported, rest was already ported
4902177 Taipan / CPO — amBER collect run-time performance optimization (cache PEMI)
4883319 CPO — Optical Engine vendor-specific parameters in amBER Only getPemiOpticalEngineTelemetry needed to be ported
4689253 Taipan CPO ETH + IB add support for OE advance debug parameters

Bugs

Issue Subject Ported Divergence
4813071 Add SPC6 support to mlxlink
4470181 [Taipan][show_module] Cable_type shows Unidentified when it should show CPO
4319675 SFP attenuation should be N/A not 0,0,0 (after CPO support)
4377273 [Taipan] PDDR calls module_ind_type per --linkx_oe (1) / --linkx_els (2) / default (0)
4364937 [Taipan] els_oper_state field taken from the wrong PDDR page
4748915 [show_module][FreeBSD] getting bus error / segfault
4407603 [Taipan][aggregated device] show_module should give 4 outputs per ASIC ❌ Already Ported
4728147 [Quantum3][--port] generic PLLP port mapping for ETH switches & Quantu0m3+ ❌ Already Ported
4917622 [Taipan][Json] missing CPO info from JSON output
5075963 [chameleon] MMCR fails for ports >128 — resolve module number via PMLP
5087623 [chameleon] SMPI shows only 17 ports — CPO uses num_ports
5094334 [pcie port] ignore the SW-controlled check with PCIE ports
4778126 [amber_collect] missing / incorrect fields in amber report (optical channel temps, etc.)

Tested Flows

Description:
 - Includes features for QTM3, SPC5, SPC6 CPO
@yairfax yairfax changed the title [Mlxlink][mstflint] Port CPO code to mstflint for 4.37.0 [Mlxlink][mstflint] Port CPO code to mstflint for 4.380 Jul 26, 2026
@yairfax
yairfax marked this pull request as draft July 26, 2026 12:23
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