memory: fit Ramsey-controlled motherboard fast RAM on the A3000/A4000

copperline.example.toml

@@ -182,6 +182,14 @@ slow = "512K"
 # 64K to 1G.
 # z3 = "16M"
 
+# Ramsey-controlled motherboard fast RAM (A3000/A4000): 32-bit local RAM
+# ending at $08000000 and growing downward, sized by Kickstart's own
+# probe rather than autoconfig. Needs a Ramsey memory controller (the
+# A3000/A4000 profiles fit one, and 4M of this RAM, by default) and a
+# 32-bit CPU. Must fill whole Ramsey banks: 1M-4M in 1M steps, or
+# 8M/12M/16M. Set to 0 to remove it.
+# motherboard = "16M"
+
 
 # Additional Zorro boards described by TOML metadata files, configured
 # in file order after the built-in [memory] fast/z3 boards. The metadata

docs/guide/configuration.md

@@ -43,6 +43,7 @@ range checks as the equivalent TOML fields:
 | `--chip SIZE` | `[memory] chip` | `512K`, `1M`, `2M`, ... |
 | `--fast SIZE` | `[memory] fast` | `0`, `1M`, `4M`, `8M`, ... |
 | `--slow SIZE` | `[memory] slow` | `0`, up to `512K` |
+| `--motherboard SIZE` | `[memory] motherboard` | Ramsey RAM (A3000/A4000): `0`, `1M`..`4M`, `8M`, `12M`, `16M` |
 | `--floppy-drives COUNT` | `[floppy] drives` | `1` to `4` wired drives (`DF0:` plus external drives) |
 | `--floppy-speed PERCENT` | `[floppy] speed` | `100` (real), `200`, `400`, `800`, or `0` (turbo) |
 | `--joystick MODE` | `[input] joystick` | `gamepad` (default), `keyboard` |
@@ -178,8 +179,8 @@ turns the driver back on automatically (it is the boot path for those
 drives), and setting the flag explicitly wins in either direction. The ROM
 file itself is never modified.
 
-Motherboard fast RAM is not emulated on either; use `[memory] z3` instead,
-which the OS is equally happy with.
+Both profiles fit their stock 4M of Ramsey-controlled motherboard fast RAM;
+`[memory] motherboard` resizes it up to 16M (see the `[memory]` section).
 
 `mem_controller` is normally left to the profile. It is broken out because
 Ramsey's registers collide with nothing else, so it can be fitted to
@@ -311,10 +312,11 @@ clock_mhz = 14.0    # optional; defaults to the model's stock speed
 
 ```toml
 [memory]
-chip = "512K"   # OCS max 512K; ECS/AGA max 2M
-fast = "0"      # Zorro II fast RAM at $200000: 64K..8M board sizes
-slow = "512K"   # A500 trapdoor RAM at $C00000: 0 or up to 512K
-z3   = "0"      # Zorro III RAM (needs a 32-bit CPU): 64K..1G, power of two
+chip = "512K"        # OCS max 512K; ECS/AGA max 2M
+fast = "0"           # Zorro II fast RAM at $200000: 64K..8M board sizes
+slow = "512K"        # A500 trapdoor RAM at $C00000: 0 or up to 512K
+motherboard = "0"    # Ramsey motherboard RAM (A3000/A4000): up to 16M
+z3   = "0"           # Zorro III RAM (needs a 32-bit CPU): 64K..1G, power of two
 ```
 
 Sizes accept `K`/`KB`/`M`/`MB` (and `G`/`GB` for Zorro III) suffixes or
@@ -327,6 +329,13 @@ plain byte counts, and must be multiples of 4 KiB.
   4M, or 8M.
 - **Slow RAM** ($C00000 "ranger" RAM) is arbitrated on the chip bus through
   Agnus exactly like chip RAM -- it is slow in the authentic way.
+- **Motherboard RAM** is the 32-bit local memory Ramsey drives on the
+  A3000/A4000: it ends at `$08000000` and grows downward (16M reaches
+  `$07000000`), and Kickstart sizes it with its own probe -- no autoconfig
+  involved. It needs a Ramsey (`[machine] mem_controller`, fitted by the
+  A3000/A4000 profiles, which also fit their stock 4M of this RAM by
+  default) and a 32-bit CPU, and must fill whole Ramsey banks: 1M-4M in
+  1M steps, or 8M, 12M, 16M. Set `motherboard = "0"` to remove it.
 - **Z3 RAM** requires a 68020/68030/68040/68060 (a 24-bit bus cannot reach it);
   Kickstart assigns its base address, usually `$40000000`.
 

docs/guide/ui.md

@@ -232,7 +232,8 @@ The layout is:
   on a machine with no CD drive) are dropped so they cannot block a launch.
 - **Category tabs** (left sidebar). *System* (chipset and Agnus/Denise
   overrides, video standard, RTC, identify board), *CPU* (model, FPU, clock,
-  caches), *Memory* (chip/fast/slow/Zorro III RAM), *ROM* (Kickstart and
+  caches), *Memory* (chip/fast/slow/motherboard/Zorro III RAM), *ROM*
+  (Kickstart and
   extended ROM), *Floppy* (drive count and speed, per-drive image and
   write-protect),
   *Hard Disk* (IDE master/slave, the SCSI controller -- A2091, A4091, or the

src/a2065.rs

@@ -555,6 +555,7 @@ mod tests {
         crate::memory::Memory {
             chip_ram: vec![0u8; 0x100],
             slow_ram: Vec::new(),
+            mb_ram: Vec::new(),
             rom: Vec::new(),
             overlay: false,
             zorro: crate::zorro::ZorroChain::default(),

src/a2091.rs

@@ -481,6 +481,7 @@ mod tests {
         Memory {
             chip_ram: vec![0u8; 512 * 1024],
             slow_ram: Vec::new(),
+            mb_ram: Vec::new(),
             rom: Vec::new(),
             overlay: false,
             zorro: ZorroChain::default(),

src/a4091.rs

@@ -1008,6 +1008,7 @@ mod tests {
         Memory {
             chip_ram: vec![0u8; 512 * 1024],
             slow_ram: Vec::new(),
+            mb_ram: Vec::new(),
             rom: Vec::new(),
             overlay: false,
             zorro: ZorroChain::default(),

src/bus.rs

@@ -5330,8 +5330,8 @@ impl Bus {
     }
 
     /// The writable RAM regions a memory hunt should scan: chip RAM,
-    /// slow/ranger RAM, and configured Zorro RAM boards, as
-    /// (base, length) pairs.
+    /// slow/ranger RAM, motherboard fast RAM, and configured Zorro RAM
+    /// boards, as (base, length) pairs.
     pub fn writable_ram_regions(&self) -> Vec<(u32, u32)> {
         let mut regions = Vec::new();
         if !self.mem.chip_ram.is_empty() {
@@ -5346,13 +5346,16 @@ impl Bus {
                 self.mem.slow_ram.len() as u32,
             ));
         }
+        if !self.mem.mb_ram.is_empty() {
+            regions.push((self.mem.mb_ram_base() as u32, self.mem.mb_ram.len() as u32));
+        }
         regions.extend(self.mem.zorro.ram_regions());
         regions
     }
 
     /// Read a 16-bit big-endian word from whichever RAM/ROM region maps
-    /// `addr` (chip, fast, slow, or ROM), for the debugger's memory dumps.
-    /// Returns 0 for unmapped addresses.
+    /// `addr` (chip, fast, slow, motherboard, or ROM), for the debugger's
+    /// memory dumps. Returns 0 for unmapped addresses.
     pub fn peek_word_any(&self, addr: u32) -> u16 {
         use crate::memory::{CHIP_RAM_BASE, ROM_BASE, SLOW_RAM_BASE};
         if let Some((board, off)) = self.mem.zorro.region_at(addr, 2) {
@@ -5369,9 +5372,10 @@ impl Bus {
                 .unwrap_or(0);
         }
         let a = addr as usize;
-        let regions: [(usize, &[u8]); 4] = [
+        let regions: [(usize, &[u8]); 5] = [
             (CHIP_RAM_BASE as usize, &self.mem.chip_ram),
             (SLOW_RAM_BASE as usize, &self.mem.slow_ram),
+            (self.mem.mb_ram_base() as usize, &self.mem.mb_ram),
             (ROM_BASE as usize, &self.mem.rom),
             (self.mem.extended_rom_base as usize, &self.mem.extended_rom),
         ];

src/bus/tests.rs

@@ -215,6 +215,7 @@ fn empty_bus_with_chip_ram(chip_ram_bytes: usize) -> Bus {
         Memory {
             chip_ram: vec![0; chip_ram_bytes],
             slow_ram: Vec::new(),
+            mb_ram: Vec::new(),
             rom: vec![0; 512 * 1024],
             overlay: true,
             zorro: crate::zorro::ZorroChain::default(),
@@ -234,6 +235,7 @@ fn empty_bus_with_collect_audio() -> (Bus, SharedFrames) {
         Memory {
             chip_ram: vec![0; 512 * 1024],
             slow_ram: Vec::new(),
+            mb_ram: Vec::new(),
             rom: vec![0; 512 * 1024],
             overlay: true,
             zorro: crate::zorro::ZorroChain::default(),
@@ -10844,3 +10846,23 @@ fn waveform_stop_finishes_early_and_rearm_replaces() {
     let _ = std::fs::remove_file(&path);
     let _ = std::fs::remove_file(&path2);
 }
+
+/// The debugger-facing helpers must reach the Ramsey motherboard RAM bank:
+/// peek_word_any serves memory dumps at its bus address and
+/// writable_ram_regions offers it to the memory hunt.
+#[test]
+fn motherboard_ram_reaches_the_debugger_helpers() {
+    let mut bus = empty_bus();
+    bus.mem.fit_mb_ram(1024 * 1024);
+    let base = bus.mem.mb_ram_base() as u32;
+    assert_eq!(base, 0x07F0_0000);
+    let top = bus.mem.mb_ram.len();
+    bus.mem.mb_ram[top - 2] = 0xBE;
+    bus.mem.mb_ram[top - 1] = 0xEF;
+    assert_eq!(bus.peek_word_any(0x07FF_FFFE), 0xBEEF);
+    // Below the fitted bank nothing answers.
+    assert_eq!(bus.peek_word_any(base - 2), 0);
+    assert!(bus
+        .writable_ram_regions()
+        .contains(&(base, 1024 * 1024_u32)));
+}

src/cdtv.rs

@@ -1339,6 +1339,7 @@ mod tests {
         Memory {
             chip_ram: vec![0u8; chip_bytes],
             slow_ram: Vec::new(),
+            mb_ram: Vec::new(),
             rom: Vec::new(),
             overlay: false,
             zorro: crate::zorro::ZorroChain::default(),