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Vulkan MoE GEMV backend for integrated/AMD GPUs (draft, complements #418) - #729

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Vulkan MoE GEMV backend for integrated/AMD GPUs (draft, complements #418)#729
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Vulkan MoE GEMV backend for integrated / AMD GPUs (DRAFT)

Isolates the Vulkan compute path for the qwen36 engine routed-expert GEMVs so it can be reviewed independently of the engine PR (#712).

What

  • vulkan_gemv.c (+ headers): Vulkan storage-buffer GEMV for the MoE expert forward.
  • int4 weights unpacked in-shader + plain float GEMV (avoids the AMD OpSDotKHR segfault on Radeon 780M); int8 float path + optional IDP shader (blacklisted on known-broken drivers).
  • Transparent startup probe; falls back to CPU MoE if vg_init() fails or COLIBRI_GPU=0.

Relation to #418

#418 (steve-m) is the project Vulkan backend, CUDA/NVIDIA-oriented (expert tier + dense + MLA). This one targets integrated/AMD GPUs (shared memory, no CUDA) — complementary, not competing. Happy to coordinate with steve-m / maintainers toward a single backend if preferred.

Status: DRAFT

Fix included here

  • 32-bit slot offsets wrap at >=4GB weights pool (layers 32-39 alias 0-7 at cache>=256). Now guarded: backend auto-disables + CPU fallback instead of silent corruption. 64-bit shader offsets (buffer_device_address) are a follow-up.

This supersedes the Vulkan portion of the now-closed #602 (engine taken over by #712).

…JustVugg#418)

Self-contained Vulkan compute backend for the routed-expert GEMVs used by the
qwen36 engine. int4 weights are unpacked in-shader with a plain float GEMV so
it runs on drivers whose int8/dot-product compiler path is broken (AMD Radeon
780M); an int8 float path and an optional OpSDotKHR IDP shader (blacklisted on
known-broken drivers) are also provided.

Targets integrated/AMD GPUs (shared system memory, no CUDA) and is complementary
to JustVugg#418 (steve-m, CUDA/NVIDIA-oriented), not a competing second backend.

Status: DRAFT. Depends on JustVugg#712 (qwen36 engine) as the caller; not yet wired into
dev's build. Integration point is vg_init()/vg_expert_ensure().

Fix: slot byte offsets were uint32_t, so a weights pool >= 4GB would wrap/alias
(layers 32-39 -> 0-7 at cache>=256). The backend now auto-disables and falls
back to the CPU MoE path instead of silently corrupting output. 64-bit shader
offsets (buffer_device_address) are a follow-up.
@Neppord

Neppord commented Aug 1, 2026

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multiple files are autogenerated from scripts that are not part of the pr, is that intentional?

/* AUTO-GENERATED from gemv_int4.spv by tools/gen_spv_header.py. Do not edit. */

@JustVugg JustVugg added the feature Nuova funzionalità label Aug 2, 2026
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enhancement New feature or request feature Nuova funzionalità vulkan Backend Vulkan/AMD

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3 participants