- 👀 I'm interested in functional verification, embedded systems and clean code
- 🌱 I'm currently learning UVM and expanding my verification skills
- 🔭 I'm currently working on a UVM-based verification environment for a data aligner DUT
- 💬 Ask me about SystemVerilog, UVM, Python
- 📫 How to reach me: LinkedIn | giannis.theodorakis2001@gmail.com
- 🔬 uvm-aligner-apb-verification — UVM verification environment for a data aligner DUT with APB register interface
- 📊 uvm-json-wave-viewer — UVM transaction recording and waveform visualization tool for EDA Playground and local use
Verification
SystemVerilog UVM Functional Coverage Constrained Random Testing SVA
Programming
Python C++ Rust Bash ARM Assembly MIPS Assembly
HDL
Verilog SystemVerilog
Tools & Protocols
Git EDA Playground Cadence Xcelium AMBA APB
Platforms
Linux