Linux build#2
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rv64ui-p-fence_i failed because the D-cache is write-back and the I-cache reads L2 non-coherently, so on fence.i the self-modified instruction fetched stale bytes. Add a walker FSM in cacheLookupUnit that, on fence, sweeps all sets/ways and writes every valid+dirty line back to L2 via the existing writeBackBuffer path; cacheModule's fence FSM drains the pipeline, runs the walker, and waits for the writebacks to reach L2 before signalling done. Tighten replayUnit/ACEUnit fenceReady to wait for the write path to drain. ISA suite 84/84 (was 83/84); fix only fires on fence so no other test is perturbed. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
…ckstep Add support for building and running nommu (M-mode, RAM @ 0x80000000) Linux images on chiron: - Add Multicore_Linux_Image submodule (build recipe + chiron docs/patches). - emulator.h: build emu.out without -DLOCKSTEP so set_interrupts() uses the real mtime>=mtimecmp timer path (the LOCKSTEP variant force-fires a timer interrupt every step, storming the kernel in timekeeping). Guarded by #ifdef LOCKSTEP, so the lock-step ISA/RTL harnesses are unchanged. - mk/run.mk: drop -DLOCKSTEP from the emu.out rule; add `linux-emu` and `linux-lockstep` targets (LINUX_IMAGE selects the bbl.bin). - scripts/run_linux.sh: boot an image on the golden model (stops at the login prompt) or run a bounded RTL-vs-golden lock-step, reporting PASS/mismatch. Single-core image boots to the buildroot login prompt; bounded RTL lock-step matches 21,471 instructions with zero divergence. Quad-core SMP image boots to userspace with CPU0 online (secondaries need per-hart CLINT MSIP modeling). Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Make `make linux-emu` an interactive Linux console on the golden model and add `make linux-sim` to boot Linux on the RTL core alone (no lock-step, no trace), with a live UART console and a progress heartbeat. Golden-model UART (emulator): - Implement the real Xilinx uartlite register map the kernel driver uses: RX@0x0, TX@0x4, STATUS@0x08 (RXVALID/TXEMPTY) — was a legacy status@0x0/ char@0x4 layout that the in-kernel uartlite driver could not drive. - Add a 1-byte RX holding register (hart.uart_rx_byte): STATUS asserts RXVALID only after a real stdin byte was read, and RX consumes it, so a "while (RXVALID)" reader terminates instead of livelocking on a phantom byte (previously a NUL flood / CPU-pegged hang). - Harden terminal.h kbhit() to init the count and honour the ioctl return (/dev/null FIONREAD garbage was the livelock trigger). - stdin reads are #ifndef LOCKSTEP (RTL is the source of truth there). - emulator_linux.cpp: register the SIGINT handler so the TTY is restored. RTL (linux-sim): - New sim/harness/linux_sim.cpp: boot a flat image on the Verilated core, stream UART TX, no golden model / no run.log; heartbeat on stderr shows committed instrs + PC so slow boots don't look frozen and a real deadlock (PC frozen while cycles climb) is visible. - rtl_model.h: edge-detect core0OutChar so each TX byte prints once. mk/run.mk: - linux-emu now runs emu.out interactively; linux-emu-check keeps the old scripted boot-to-login check; add linux-sim target + build rule. - emu.out rule depends on all emulator headers/.inc so edits trigger rebuilds. Note: interactive input requires a kernel-side uartlite RX-poll patch (the HW has no wired uartlite IRQ); that patch lives in the external Linux tree. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
The RTL UART (quard_uart) only fired its TX char register (putChar -> lastUartChars / core0OutChar) on offset 0x30, the legacy bare-metal convention. The Linux xilinx-uartlite driver and earlycon write TX at ULITE_TX = base+0x04 (0x40600004), so the kernel's console output never reached the RTL's putChar and `make linux-sim` was silent even though the core was running the kernel. Make putChar.valid also match a write to 0x40600004 (full-address match so it doesn't collide with CLINT writes whose low byte is 0x04, e.g. msip 0x02004004). This surfaces the kernel console on the RTL (verified: "bbl loader" now prints) and also re-enables the hardcoded auto-login detection, which keys off the same putChar -> lastUartChars stream matching "buildroot login: ". linux_sim.cpp: gate the progress heartbeat behind LINUX_SIM_HB=1 (off by default) so it no longer interleaves with the now-working guest console. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Submodule f432793: fix the build scripts so they actually produce a bootable chiron image (correct configs/mem-start, apply patches), add build_image.sh automation and the RX-poll uartlite patch, and update the README (interactive input works; SMP/console gotchas; linux-emu/linux-sim targets). Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Golden model and RTL now both bring up 4 harts: CLINT msip wiring on the RTL side, a CCU snoop-starvation fix, and a ROB coherent-squash livelock fix (robFifo flushAll via coherentLoadInvalidReg) so multi-core coherence traffic no longer wedges the pipeline. Adds a fast no-trace Verilator build (obj_dir_fast, -O3, no VCD) for long-running boots, wired through new `sim-fast` / `linux-sim` / `test-q4` / `profile-quad` make targets. profile_quad.cpp gains a --print-interval flag for lightweight per-core PC tracing without rebuilding the RTL model, and both profile harnesses skip the ISA-test a7==93 heuristic when a --done-pc completion spec is active (avoids false "ISA TEST FAILED" on benchmarks that transiently compute 93 mid-kernel). Quad-core benchmarks (make test-q4) and the ISA suite (84/84) are green. Linux boots and reaches "smp: Bringing up secondary CPUs" but still hangs shortly after that point (secondary harts spin on a stuck seqlock) — tracked as a follow-up, not yet root-caused. Removes DEADLOCK_DIAGNOSIS.md (superseded by this checkpoint). Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
apply_configs_and_patches + build_image.sh q4 now produce a working bins/linux-q4.bin from a clean buildroot checkout (bbl.bin target fix, new riscv-pk minit.c patch, corrected PAGE_OFFSET patch context). Pairs with this repo's SMP bring-up work: `make linux-emu` / `make linux-sim` now have a real quad-core image to boot. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Automates the manual Multicore_Linux_Image README steps: `make patch` updates the linux/buildroot/riscv-pk submodules and stages chiron's config + source patches in one step; `make linux-image-q4` (or -s1) then builds the flat bbl.bin and installs it into bins/. Requires the buildroot toolchain to already be built once (`make linux-toolchain`, slow) before RISCV is available. Bumps Multicore_Linux_Image: linux/ is now a properly registered submodule (was silently skipped by `git submodule update` before), and the PAGE_OFFSET Kconfig patch is a full-file copy like the other three chiron source patches (mtrap.c, minit.c, uartlite.c) instead of a separate `patch -p1` step. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
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