This project explores how an artificial neural network can learn MOSFET electrical behaviour from simulated I-V data and act as a first step toward SPICE model extraction.
The current implementation is intentionally lightweight:
- Generates MOSFET drain current sweeps using a compact Shichman-Hodges style model with process/device variation.
- Trains a PyTorch neural network surrogate to predict
log10(|Id| + eps)from bias and geometry inputs. - Evaluates generalisation on held-out operating points.
- Tests robustness to imperfect input data by injecting bias noise.
mosfet_ann/
data.py Synthetic MOSFET data generation
model.py ANN training, prediction, evaluation, persistence
robustness.py Noise-sensitivity experiment
scripts/
generate_data.py
train_ann.py
predict_current.py
evaluate_robustness.py
docs/
report_outline.md
literature_notes.md
tests/
test_pipeline.py
python3 -m venv .venv
source .venv/bin/activate
pip install -e ".[dev]"Generate a dataset:
python scripts/generate_data.py --samples 8000 --output data/mosfet_iv.csvTrain the ANN:
python scripts/train_ann.py --data data/mosfet_iv.csv --model artifacts/mosfet_ann.ptPredict drain current for one MOSFET bias/device point:
python scripts/predict_current.py \
--model artifacts/mosfet_ann.pt \
--vgs 0.8 \
--vds 0.8 \
--width-um 1.0 \
--length-um 0.18Evaluate robustness to noisy bias inputs:
python scripts/evaluate_robustness.py \
--data data/mosfet_iv.csv \
--model artifacts/mosfet_ann.pt \
--output artifacts/robustness.csvThe ANN uses:
vgs: gate-source voltagevds: drain-source voltagevbs: body-source voltagewidth_um: MOSFET width in micrometreslength_um: MOSFET length in micrometrestemperature_c: temperature in Celsiusvth0: nominal threshold voltagekp: transconductance parameterlambda_: channel-length modulationgamma: body-effect coefficientphi: surface potential
The target is log10(abs(id_a) + 1e-15), which is much easier for an ANN to
learn than raw drain current across many orders of magnitude.
- Replace or complement the analytic generator with
ngspicesimulations. - Add C-V data targets, not just I-V.
- Compare architectures: MLP, residual MLP, monotonic networks, and physics-informed loss terms.
- Export a SPICE-compatible behavioural source or Verilog-A approximation.
- Validate against measured MOSFET characterisation data when available.