feat(dcp): add selected-record sparse CKV decode#4
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Summary
CUDA-IPC/P2P exchange
The implementation is opt-in through
VLLM_B12X_MLA_SPARSE_DECODE_CKV_GATHER=1. It also exposes maximum-sequenceand pool-record controls. Unsupported topology, dtype, metadata, capacity, or
P2P conditions fall back before the selected-record transport begins.
Credit to @koush and @luke for the sparse-CKV gather, shared-layer lookahead,
and MTP deduplication design discussions that led to this port.
Dependencies
FujitsuPolycom/sparkinfer#2The stack is rebased on
local-inference-lab/vllm@73e4a8cdeand the renamedlocal-inference-lab/sparkinfer@ec2cd4dpackage/API layout. The exact rebasedimage passed the four-GPU direct/CE transport gate and the full model/API smoke.
Validation
tests passed
git diff --checkpassedai01/glm52-fork-pr4:ef0b21f0bprompt tokens with sparse decode enabled
graph, and exchange-cleanup paths are covered
corruption
Matched coding A/B
Same image, launch configuration, prompt, five runs per arm; only selected-
record sparse decode changed.
The coding probe is the benchmark harness's sequential CC1 Sieve prompt,
matching
/mnt/test.pythroughput semantics. A synthetic padding-stream decodeprompt produced much lower MTP acceptance and is not used as the primary
performance claim.
Capacity and prefill
Test host
ai01: ASUS Pro WS WRX90E-SAGE SE, AMD Ryzen Threadripper PRO 9965WX,128 GiB RAM, and 4x NVIDIA RTX PRO 6000 Blackwell 96 GB GPUs at 400 W. Each GPU
uses a PCIe 5.0 x16-capable link; IOMMU is disabled. Serving topology was
TP4/DCP4/MTP3 with native
nvfp4_ds_mla, BF16 RoPE, max model length 131,072,max batch 4,096, max sequences 8, and graph size 32.
Remaining scope
those deployments
direct-final-slot writer may reduce workspace and transport overhead further
local-inference-lab/vllm#145and theSparkinfer compile-cache fix from
local-inference-lab/sparkinfer#52shouldbe evaluated as a separate
paired accuracy-baseline migration; the 432-byte transport ABI is unchanged
Design document
GLM-5.2 Sparse CKV under Decode Context Parallelism is the canonical architecture, configuration, validation, and upstream-decomposition reference for this PR stack.