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integration: validate selected-record CKV transports on latest Sparkinfer#4

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integration: validate selected-record CKV transports on latest Sparkinfer#4
FujitsuPolycom wants to merge 6 commits into
base/upstream-master-20260721from
codex/sparse-ckv-integration-20260721

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@FujitsuPolycom

@FujitsuPolycom FujitsuPolycom commented Jul 21, 2026

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Purpose

Fork-only integration gate for selected-record CKV transport and bounded
long-context indexer scratch, rebased onto
local-inference-lab/sparkinfer master at bce2c2b.

No upstream PR is authorized by this integration PR.

What is included

  • direct CUDA-IPC selected-record exchange
  • copy-engine selected-record exchange
  • rotated peer scheduling, bounded slabs, deferred graph-safe release
  • single-plane and bulk three-plane S1/S2/S3 exchange
  • 432-byte BF16-RoPE and 368-byte FP8-RoPE record coverage
  • disposable DCP A2A channel lifecycle fix
  • bounded streaming fallback for long-context paged-indexer fold scratch

The paired vLLM integration is
FujitsuPolycom/vllm#7.

Long-context scratch fix

The paged-indexer planner keeps the fast two-level fold when its candidate-plane
scratch fits the configured cap. Larger requests use the existing bounded
two-buffer streaming carry fold instead of allocating scratch proportional to
the complete prompt.

The final model completed clean cold-prefill gates at:

Actual prompt tok/s
128,888 2,887
257,634 2,495
291,822 2,432

This fixes the prior 163,840-token OOM without reducing the 304,863-token KV
pool or changing short-context routing.

Validation

  • selected-record CPU transport suite: 49 passed
  • bounded-scratch focused suite: 9 passed, including the 167,936-token shape
  • four-GPU 368-byte direct and CE byte-equivalence gates: passed
  • paired TP4/DCP4/MTP3 GLM model/API/transport gate: passed
  • final aggregate decode: 32K C1/C2/C4/C8 = 89.2/118.2/137.1/164.7 tok/s

Scope

  • physically validated on four P2P-capable RTX PRO 6000 Blackwell GPUs
  • TP6/TP8/DCP8 and non-P2P fallbacks still need external validation
  • all transport paths remain explicitly gated; unsupported cases retain stock
    behavior

Credits

The selected-record design is primarily based on Koush's sparse-CKV and MTP
deduplication work, with Luke Alonso's B12X/Sparkinfer infrastructure.
Implementation, testing, benchmarking, and documentation were developed with
OpenAI Codex assistance and validated on the target host.

Add a direct CUDA-IPC exchange for destination-selected fixed-width records, expose it through the Sparkinfer PCIe facade, and preserve runtime-JIT CUDA sources in built wheels.

Co-authored-by: OpenAI Codex <codex@openai.com>

Signed-off-by: FujitsuPolycom <87842395+FujitsuPolycom@users.noreply.github.com>
Add single-plane and three-plane CUDA-IPC copy-engine exchange with rotated peer scheduling, bounded slab overlays, graph-safe deferred release, and large-offset coverage.

Co-authored-by: OpenAI Codex <codex@openai.com>

Signed-off-by: FujitsuPolycom <87842395+FujitsuPolycom@users.noreply.github.com>
Assisted-by: OpenAI Codex
Signed-off-by: FujitsuPolycom <87842395+FujitsuPolycom@users.noreply.github.com>
@FujitsuPolycom

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