diff --git a/riscv64/riscv64asm/gnu.go b/riscv64/riscv64asm/gnu.go index 324b365f..5d4299f1 100644 --- a/riscv64/riscv64asm/gnu.go +++ b/riscv64/riscv64asm/gnu.go @@ -372,6 +372,18 @@ gnuSyntaxSwitch: case VSETVL: args[0], args[2] = args[2], args[0] + + case FLI_S, FLI_D, FLI_H, FLI_Q: + if len(args) > 1 { + args[1] = fliConstants[inst.Args[1].(Uimm).Imm] + } + + case FROUND_S, FROUND_D, FROUND_H, FROUND_Q, + FROUNDNX_S, FROUNDNX_D, FROUNDNX_H, FROUNDNX_Q: + args = append(args, frmName((inst.Enc>>12)&0x7)) + + case FCVTMOD_W_D: + args = append(args, "rtz") } if args != nil { @@ -436,3 +448,62 @@ func gnuVectorOp(inst Inst, args []string) string { return op + " " + strings.Join(args, ",") } + +// frmName returns the GNU assembler rounding mode suffix for the given +// funct3 rounding mode encoding. +func frmName(funct3 uint32) string { + switch funct3 { + case 0: + return "rne" + case 1: + return "rtz" + case 2: + return "rdn" + case 3: + return "rup" + case 4: + return "rmm" + case 7: + return "dyn" + default: + return "unknown" + } +} + +// fliConstants provides the objdump-format string for each of the 32 FLI +// immediate values. The constants are the same for all precisions (S/D/H/Q) +// except for index 1 (minimum positive normal), which objdump shows as "min". +var fliConstants = [32]string{ + "-0x1p+0", // -1.0 + "min", // minimum positive normal + "0x1p-16", // 2^-16 + "0x1p-15", // 2^-15 + "0x1p-8", // 2^-8 + "0x1p-7", // 2^-7 + "0x1p-4", // 2^-4 + "0x1p-3", // 2^-3 + "0x1p-2", // 0.25 + "0x1.4p-2", // 0.3125 + "0x1.8p-2", // 0.375 + "0x1.cp-2", // 0.4375 + "0x1p-1", // 0.5 + "0x1.4p-1", // 0.625 + "0x1.8p-1", // 0.75 + "0x1.cp-1", // 0.875 + "0x1p+0", // 1.0 + "0x1.4p+0", // 1.25 + "0x1.8p+0", // 1.5 + "0x1.cp+0", // 1.75 + "0x1p+1", // 2.0 + "0x1.4p+1", // 2.5 + "0x1.8p+1", // 3.0 + "0x1p+2", // 4.0 + "0x1p+3", // 8.0 + "0x1p+4", // 16.0 + "0x1p+7", // 128.0 + "0x1p+8", // 256.0 + "0x1p+15", // 2^15 + "0x1p+16", // 2^16 + "inf", // +Inf + "nan", // canonical NaN +} diff --git a/riscv64/riscv64asm/objdumpext_test.go b/riscv64/riscv64asm/objdumpext_test.go index acbd9256..1c1282d0 100644 --- a/riscv64/riscv64asm/objdumpext_test.go +++ b/riscv64/riscv64asm/objdumpext_test.go @@ -290,7 +290,7 @@ func writeELF64(f *os.File, size int) error { // RISC-V objdump needs the .riscv.attributes section to identify extensions. exts := "rv64i2p0_m2p0_a2p0_f2p0_d2p0_q2p0_c2p0_v1p0_" + "zicbom1p0_zicbop1p0_zicboz1p0_zicond1p0_zmmul1p0_" + - "zfh1p0_zfhmin1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0_" + + "zfa1p0_zfh1p0_zfhmin1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0_" + "zvkg1p0_zvkned1p0_zvknha1p0_zvknhb1p0_zvksed1p0_zvksh1p0" b := buildRISCVAttributes(exts) sect = elf.Section64{ diff --git a/riscv64/riscv64asm/plan9x.go b/riscv64/riscv64asm/plan9x.go index 59f2a5b9..f2912b19 100644 --- a/riscv64/riscv64asm/plan9x.go +++ b/riscv64/riscv64asm/plan9x.go @@ -384,6 +384,20 @@ goSyntaxSwitch: case VSETVL: args[0], args[2] = args[2], args[0] + + case FLI_S, FLI_D, FLI_H, FLI_Q: + if len(args) > 1 { + switch inst.Op { + case FLI_S: + args[1] = fliSConstants[inst.Args[1].(Uimm).Imm] + case FLI_D: + args[1] = fliDConstants[inst.Args[1].(Uimm).Imm] + case FLI_H: + args[1] = fliHConstants[inst.Args[1].(Uimm).Imm] + case FLI_Q: + args[1] = fliQConstants[inst.Args[1].(Uimm).Imm] + } + } } // Reverse args, placing dest last. @@ -491,3 +505,143 @@ func plan9VectorOp(inst Inst, args []string) string { op = strings.Replace(op, ".", "", -1) return op + " " + strings.Join(args, ", ") } + +var fliSConstants = [32]string{ + "$(-1.0)", + "$(1.1754943508222875e-38)", + "$(1.52587890625e-05)", + "$(3.0517578125e-05)", + "$(0.00390625)", + "$(0.0078125)", + "$(0.0625)", + "$(0.125)", + "$(0.25)", + "$(0.3125)", + "$(0.375)", + "$(0.4375)", + "$(0.5)", + "$(0.625)", + "$(0.75)", + "$(0.875)", + "$(1.0)", + "$(1.25)", + "$(1.5)", + "$(1.75)", + "$(2.0)", + "$(2.5)", + "$(3.0)", + "$(4.0)", + "$(8.0)", + "$(16.0)", + "$(128.0)", + "$(256.0)", + "$(32768.0)", + "$(65536.0)", + "$(+Inf)", + "$(NaN)", +} + +var fliDConstants = [32]string{ + "$(-1.0)", + "$(2.2250738585072014e-308)", + "$(1.52587890625e-05)", + "$(3.0517578125e-05)", + "$(0.00390625)", + "$(0.0078125)", + "$(0.0625)", + "$(0.125)", + "$(0.25)", + "$(0.3125)", + "$(0.375)", + "$(0.4375)", + "$(0.5)", + "$(0.625)", + "$(0.75)", + "$(0.875)", + "$(1.0)", + "$(1.25)", + "$(1.5)", + "$(1.75)", + "$(2.0)", + "$(2.5)", + "$(3.0)", + "$(4.0)", + "$(8.0)", + "$(16.0)", + "$(128.0)", + "$(256.0)", + "$(32768.0)", + "$(65536.0)", + "$(+Inf)", + "$(NaN)", +} + +var fliHConstants = [32]string{ + "$(-1.0)", + "$(6.103515625e-05)", + "$(1.52587890625e-05)", + "$(3.0517578125e-05)", + "$(0.00390625)", + "$(0.0078125)", + "$(0.0625)", + "$(0.125)", + "$(0.25)", + "$(0.3125)", + "$(0.375)", + "$(0.4375)", + "$(0.5)", + "$(0.625)", + "$(0.75)", + "$(0.875)", + "$(1.0)", + "$(1.25)", + "$(1.5)", + "$(1.75)", + "$(2.0)", + "$(2.5)", + "$(3.0)", + "$(4.0)", + "$(8.0)", + "$(16.0)", + "$(128.0)", + "$(256.0)", + "$(32768.0)", + "$(65536.0)", + "$(+Inf)", + "$(NaN)", +} + +var fliQConstants = [32]string{ + "$(-1.0)", + "$(3.3621031431120935062626778173217526e-4932)", + "$(1.52587890625e-05)", + "$(3.0517578125e-05)", + "$(0.00390625)", + "$(0.0078125)", + "$(0.0625)", + "$(0.125)", + "$(0.25)", + "$(0.3125)", + "$(0.375)", + "$(0.4375)", + "$(0.5)", + "$(0.625)", + "$(0.75)", + "$(0.875)", + "$(1.0)", + "$(1.25)", + "$(1.5)", + "$(1.75)", + "$(2.0)", + "$(2.5)", + "$(3.0)", + "$(4.0)", + "$(8.0)", + "$(16.0)", + "$(128.0)", + "$(256.0)", + "$(32768.0)", + "$(65536.0)", + "$(+Inf)", + "$(NaN)", +} diff --git a/riscv64/riscv64asm/tables.go b/riscv64/riscv64asm/tables.go index 1de060f1..0883d891 100644 --- a/riscv64/riscv64asm/tables.go +++ b/riscv64/riscv64asm/tables.go @@ -176,6 +176,7 @@ const ( FCLASS_H FCLASS_Q FCLASS_S + FCVTMOD_W_D FCVT_D_L FCVT_D_LU FCVT_D_Q @@ -227,12 +228,24 @@ const ( FEQ_Q FEQ_S FLD + FLEQ_D + FLEQ_H + FLEQ_Q + FLEQ_S FLE_D FLE_H FLE_Q FLE_S FLH + FLI_D + FLI_H + FLI_Q + FLI_S FLQ + FLTQ_D + FLTQ_H + FLTQ_Q + FLTQ_S FLT_D FLT_H FLT_Q @@ -242,10 +255,18 @@ const ( FMADD_H FMADD_Q FMADD_S + FMAXM_D + FMAXM_H + FMAXM_Q + FMAXM_S FMAX_D FMAX_H FMAX_Q FMAX_S + FMINM_D + FMINM_H + FMINM_Q + FMINM_S FMIN_D FMIN_H FMIN_Q @@ -258,6 +279,8 @@ const ( FMUL_H FMUL_Q FMUL_S + FMVH_X_Q + FMVP_Q_X FMV_D_X FMV_H_X FMV_W_X @@ -272,6 +295,14 @@ const ( FNMSUB_H FNMSUB_Q FNMSUB_S + FROUNDNX_D + FROUNDNX_H + FROUNDNX_Q + FROUNDNX_S + FROUND_D + FROUND_H + FROUND_Q + FROUND_S FSD FSGNJN_D FSGNJN_H @@ -1200,6 +1231,7 @@ var opstr = [...]string{ FCLASS_H: "FCLASS.H", FCLASS_Q: "FCLASS.Q", FCLASS_S: "FCLASS.S", + FCVTMOD_W_D: "FCVTMOD.W.D", FCVT_D_L: "FCVT.D.L", FCVT_D_LU: "FCVT.D.LU", FCVT_D_Q: "FCVT.D.Q", @@ -1251,12 +1283,24 @@ var opstr = [...]string{ FEQ_Q: "FEQ.Q", FEQ_S: "FEQ.S", FLD: "FLD", + FLEQ_D: "FLEQ.D", + FLEQ_H: "FLEQ.H", + FLEQ_Q: "FLEQ.Q", + FLEQ_S: "FLEQ.S", FLE_D: "FLE.D", FLE_H: "FLE.H", FLE_Q: "FLE.Q", FLE_S: "FLE.S", FLH: "FLH", + FLI_D: "FLI.D", + FLI_H: "FLI.H", + FLI_Q: "FLI.Q", + FLI_S: "FLI.S", FLQ: "FLQ", + FLTQ_D: "FLTQ.D", + FLTQ_H: "FLTQ.H", + FLTQ_Q: "FLTQ.Q", + FLTQ_S: "FLTQ.S", FLT_D: "FLT.D", FLT_H: "FLT.H", FLT_Q: "FLT.Q", @@ -1266,10 +1310,18 @@ var opstr = [...]string{ FMADD_H: "FMADD.H", FMADD_Q: "FMADD.Q", FMADD_S: "FMADD.S", + FMAXM_D: "FMAXM.D", + FMAXM_H: "FMAXM.H", + FMAXM_Q: "FMAXM.Q", + FMAXM_S: "FMAXM.S", FMAX_D: "FMAX.D", FMAX_H: "FMAX.H", FMAX_Q: "FMAX.Q", FMAX_S: "FMAX.S", + FMINM_D: "FMINM.D", + FMINM_H: "FMINM.H", + FMINM_Q: "FMINM.Q", + FMINM_S: "FMINM.S", FMIN_D: "FMIN.D", FMIN_H: "FMIN.H", FMIN_Q: "FMIN.Q", @@ -1282,6 +1334,8 @@ var opstr = [...]string{ FMUL_H: "FMUL.H", FMUL_Q: "FMUL.Q", FMUL_S: "FMUL.S", + FMVH_X_Q: "FMVH.X.Q", + FMVP_Q_X: "FMVP.Q.X", FMV_D_X: "FMV.D.X", FMV_H_X: "FMV.H.X", FMV_W_X: "FMV.W.X", @@ -1296,6 +1350,14 @@ var opstr = [...]string{ FNMSUB_H: "FNMSUB.H", FNMSUB_Q: "FNMSUB.Q", FNMSUB_S: "FNMSUB.S", + FROUNDNX_D: "FROUNDNX.D", + FROUNDNX_H: "FROUNDNX.H", + FROUNDNX_Q: "FROUNDNX.Q", + FROUNDNX_S: "FROUNDNX.S", + FROUND_D: "FROUND.D", + FROUND_H: "FROUND.H", + FROUND_Q: "FROUND.Q", + FROUND_S: "FROUND.S", FSD: "FSD", FSGNJN_D: "FSGNJN.D", FSGNJN_H: "FSGNJN.H", @@ -2392,6 +2454,8 @@ var instFormats = [...]instFormat{ {mask: 0xfff0707f, value: 0xe6001053, op: FCLASS_Q, args: argTypeList{arg_rd, arg_fs1}}, // FCLASS.S rd, fs1 {mask: 0xfff0707f, value: 0xe0001053, op: FCLASS_S, args: argTypeList{arg_rd, arg_fs1}}, + // FCVTMOD.W.D rd, fs1 + {mask: 0xfff0707f, value: 0xc2801053, op: FCVTMOD_W_D, args: argTypeList{arg_rd, arg_fs1}}, // FCVT.D.L fd, rs1 {mask: 0xfff0007f, value: 0xd2200053, op: FCVT_D_L, args: argTypeList{arg_fd, arg_rs1}}, // FCVT.D.LU fd, rs1 @@ -2494,6 +2558,14 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0xa0002053, op: FEQ_S, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, // FLD fd, rs1_mem {mask: 0x0000707f, value: 0x00003007, op: FLD, args: argTypeList{arg_fd, arg_rs1_mem}}, + // FLEQ.D rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa2004053, op: FLEQ_D, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, + // FLEQ.H rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa4004053, op: FLEQ_H, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, + // FLEQ.Q rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa6004053, op: FLEQ_Q, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, + // FLEQ.S rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa0004053, op: FLEQ_S, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, // FLE.D rd, fs1, fs2 {mask: 0xfe00707f, value: 0xa2000053, op: FLE_D, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, // FLE.H rd, fs1, fs2 @@ -2504,8 +2576,24 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0xa0000053, op: FLE_S, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, // FLH fd, rs1_mem {mask: 0x0000707f, value: 0x00001007, op: FLH, args: argTypeList{arg_fd, arg_rs1_mem}}, + // FLI.D fd, zimm + {mask: 0xfff0707f, value: 0xf2100053, op: FLI_D, args: argTypeList{arg_fd, arg_zimm}}, + // FLI.H fd, zimm + {mask: 0xfff0707f, value: 0xf4100053, op: FLI_H, args: argTypeList{arg_fd, arg_zimm}}, + // FLI.Q fd, zimm + {mask: 0xfff0707f, value: 0xf6100053, op: FLI_Q, args: argTypeList{arg_fd, arg_zimm}}, + // FLI.S fd, zimm + {mask: 0xfff0707f, value: 0xf0100053, op: FLI_S, args: argTypeList{arg_fd, arg_zimm}}, // FLQ fd, rs1_mem {mask: 0x0000707f, value: 0x00004007, op: FLQ, args: argTypeList{arg_fd, arg_rs1_mem}}, + // FLTQ.D rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa2005053, op: FLTQ_D, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, + // FLTQ.H rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa4005053, op: FLTQ_H, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, + // FLTQ.Q rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa6005053, op: FLTQ_Q, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, + // FLTQ.S rd, fs1, fs2 + {mask: 0xfe00707f, value: 0xa0005053, op: FLTQ_S, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, // FLT.D rd, fs1, fs2 {mask: 0xfe00707f, value: 0xa2001053, op: FLT_D, args: argTypeList{arg_rd, arg_fs1, arg_fs2}}, // FLT.H rd, fs1, fs2 @@ -2524,6 +2612,14 @@ var instFormats = [...]instFormat{ {mask: 0x0600007f, value: 0x06000043, op: FMADD_Q, args: argTypeList{arg_fd, arg_fs1, arg_fs2, arg_fs3}}, // FMADD.S fd, fs1, fs2, fs3 {mask: 0x0600007f, value: 0x00000043, op: FMADD_S, args: argTypeList{arg_fd, arg_fs1, arg_fs2, arg_fs3}}, + // FMAXM.D fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x2a003053, op: FMAXM_D, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMAXM.H fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x2c003053, op: FMAXM_H, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMAXM.Q fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x2e003053, op: FMAXM_Q, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMAXM.S fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x28003053, op: FMAXM_S, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, // FMAX.D fd, fs1, fs2 {mask: 0xfe00707f, value: 0x2a001053, op: FMAX_D, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, // FMAX.H fd, fs1, fs2 @@ -2532,6 +2628,14 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0x2e001053, op: FMAX_Q, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, // FMAX.S fd, fs1, fs2 {mask: 0xfe00707f, value: 0x28001053, op: FMAX_S, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMINM.D fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x2a002053, op: FMINM_D, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMINM.H fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x2c002053, op: FMINM_H, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMINM.Q fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x2e002053, op: FMINM_Q, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMINM.S fd, fs1, fs2 + {mask: 0xfe00707f, value: 0x28002053, op: FMINM_S, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, // FMIN.D fd, fs1, fs2 {mask: 0xfe00707f, value: 0x2a000053, op: FMIN_D, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, // FMIN.H fd, fs1, fs2 @@ -2556,6 +2660,10 @@ var instFormats = [...]instFormat{ {mask: 0xfe00007f, value: 0x16000053, op: FMUL_Q, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, // FMUL.S fd, fs1, fs2 {mask: 0xfe00007f, value: 0x10000053, op: FMUL_S, args: argTypeList{arg_fd, arg_fs1, arg_fs2}}, + // FMVH.X.Q rd, fs1 + {mask: 0xfff0707f, value: 0xe6100053, op: FMVH_X_Q, args: argTypeList{arg_rd, arg_fs1}}, + // FMVP.Q.X fd, rs1, rs2 + {mask: 0xfe00707f, value: 0xb6000053, op: FMVP_Q_X, args: argTypeList{arg_fd, arg_rs1, arg_rs2}}, // FMV.D.X fd, rs1 {mask: 0xfff0707f, value: 0xf2000053, op: FMV_D_X, args: argTypeList{arg_fd, arg_rs1}}, // FMV.H.X fd, rs1 @@ -2584,6 +2692,22 @@ var instFormats = [...]instFormat{ {mask: 0x0600007f, value: 0x0600004b, op: FNMSUB_Q, args: argTypeList{arg_fd, arg_fs1, arg_fs2, arg_fs3}}, // FNMSUB.S fd, fs1, fs2, fs3 {mask: 0x0600007f, value: 0x0000004b, op: FNMSUB_S, args: argTypeList{arg_fd, arg_fs1, arg_fs2, arg_fs3}}, + // FROUNDNX.D fd, fs1 + {mask: 0xfff0007f, value: 0x42500053, op: FROUNDNX_D, args: argTypeList{arg_fd, arg_fs1}}, + // FROUNDNX.H fd, fs1 + {mask: 0xfff0007f, value: 0x44500053, op: FROUNDNX_H, args: argTypeList{arg_fd, arg_fs1}}, + // FROUNDNX.Q fd, fs1 + {mask: 0xfff0007f, value: 0x46500053, op: FROUNDNX_Q, args: argTypeList{arg_fd, arg_fs1}}, + // FROUNDNX.S fd, fs1 + {mask: 0xfff0007f, value: 0x40500053, op: FROUNDNX_S, args: argTypeList{arg_fd, arg_fs1}}, + // FROUND.D fd, fs1 + {mask: 0xfff0007f, value: 0x42400053, op: FROUND_D, args: argTypeList{arg_fd, arg_fs1}}, + // FROUND.H fd, fs1 + {mask: 0xfff0007f, value: 0x44400053, op: FROUND_H, args: argTypeList{arg_fd, arg_fs1}}, + // FROUND.Q fd, fs1 + {mask: 0xfff0007f, value: 0x46400053, op: FROUND_Q, args: argTypeList{arg_fd, arg_fs1}}, + // FROUND.S fd, fs1 + {mask: 0xfff0007f, value: 0x40400053, op: FROUND_S, args: argTypeList{arg_fd, arg_fs1}}, // FSD fs2, rs1_store {mask: 0x0000707f, value: 0x00003027, op: FSD, args: argTypeList{arg_fs2, arg_rs1_store}}, // FSGNJN.D fd, fs1, fs2 diff --git a/riscv64/riscv64asm/testdata/gnucases.txt b/riscv64/riscv64asm/testdata/gnucases.txt index db1fc8f4..bc64eaa0 100644 --- a/riscv64/riscv64asm/testdata/gnucases.txt +++ b/riscv64/riscv64asm/testdata/gnucases.txt @@ -432,6 +432,80 @@ b373530e| czero.nez x7,x6,x5 13e0121c| prefetch.r 448(x5) 13e0321c| prefetch.w 448(x5) 13e07200| ori x0,x5,7 + +# 24.: "Zfa" Extension for Additional Floating-Point Instructions, Version 1.0 +d30010f0| fli.s f1,-0x1p+0 +d38010f0| fli.s f1,min +d30011f0| fli.s f1,0x1p-16 +d38011f0| fli.s f1,0x1p-15 +d30012f0| fli.s f1,0x1p-8 +d38012f0| fli.s f1,0x1p-7 +d30013f0| fli.s f1,0x1p-4 +d38013f0| fli.s f1,0x1p-3 +d30014f0| fli.s f1,0x1p-2 +d38014f0| fli.s f1,0x1.4p-2 +d30015f0| fli.s f1,0x1.8p-2 +d38015f0| fli.s f1,0x1.cp-2 +d30016f0| fli.s f1,0x1p-1 +d38016f0| fli.s f1,0x1.4p-1 +d30017f0| fli.s f1,0x1.8p-1 +d38017f0| fli.s f1,0x1.cp-1 +d30018f0| fli.s f1,0x1p+0 +d38018f0| fli.s f1,0x1.4p+0 +d30019f0| fli.s f1,0x1.8p+0 +d38019f0| fli.s f1,0x1.cp+0 +d3001af0| fli.s f1,0x1p+1 +d3801af0| fli.s f1,0x1.4p+1 +d3001bf0| fli.s f1,0x1.8p+1 +d3801bf0| fli.s f1,0x1p+2 +d3001cf0| fli.s f1,0x1p+3 +d3801cf0| fli.s f1,0x1p+4 +d3001df0| fli.s f1,0x1p+7 +d3801df0| fli.s f1,0x1p+8 +d3001ef0| fli.s f1,0x1p+15 +d3801ef0| fli.s f1,0x1p+16 +d3001ff0| fli.s f1,inf +d3801ff0| fli.s f1,nan +d30010f2| fli.d f1,-0x1p+0 +d38010f2| fli.d f1,min +d30011f2| fli.d f1,0x1p-16 +d38011f2| fli.d f1,0x1p-15 +d30012f2| fli.d f1,0x1p-8 +d38012f2| fli.d f1,0x1p-7 +d30013f2| fli.d f1,0x1p-4 +d38013f2| fli.d f1,0x1p-3 +d30018f2| fli.d f1,0x1p+0 +d3001af2| fli.d f1,0x1p+1 +53a5c528| fminm.s f10,f11,f12 +53a5c52a| fminm.d f10,f11,f12 +d3395a29| fmaxm.s f19,f20,f21 +d3395a2b| fmaxm.d f19,f20,f21 +d3044940| fround.s f9,f18,rne +d3044942| fround.d f9,f18,rne +d3045940| froundnx.s f9,f18,rne +d3045942| froundnx.d f9,f18,rne +d39580c2| fcvtmod.w.d x11,f1,rtz +d3c520a0| fleq.s x11,f1,f2 +d3c520a2| fleq.d x11,f1,f2 +d3d524a1| fltq.s x11,f9,f18 +d3d524a3| fltq.d x11,f9,f18 +d3a3412c| fminm.h f7,f3,f4 +d3a3412e| fminm.q f7,f3,f4 +d3b3412c| fmaxm.h f7,f3,f4 +d3b3412e| fmaxm.q f7,f3,f4 +d38310f4| fli.h f7,min +d30318f4| fli.h f7,0x1p+0 +d3831ff4| fli.h f7,nan +d38310f6| fli.q f7,min +d30318f6| fli.q f7,0x1p+0 +d3831ff6| fli.q f7,nan +d3834144| fround.h f7,f3,rne +d3834146| fround.q f7,f3,rne +d3835144| froundnx.h f7,f3,rne +d3835146| froundnx.q f7,f3,rne +d38311e6| fmvh.x.q x7,f3 +d38341b6| fmvp.q.x f7,x3,x4 + # 28.4.3: Zbc: Carry-less multiplication b313530a| clmul x7,x6,x5 b333530a| clmulh x7,x6,x5 diff --git a/riscv64/riscv64asm/testdata/plan9cases.txt b/riscv64/riscv64asm/testdata/plan9cases.txt index a361d65e..3469a122 100644 --- a/riscv64/riscv64asm/testdata/plan9cases.txt +++ b/riscv64/riscv64asm/testdata/plan9cases.txt @@ -385,6 +385,80 @@ b373530e| CZERONEZ X5, X6, X7 13e0121c| PREFETCHR 448(X5) 13e0321c| PREFETCHW 448(X5) 13e07200| ORI $7, X5, X0 + +# 24.: "Zfa" Extension for Additional Floating-Point Instructions, Version 1.0 +d30010f0| FLIS $(-1.0), F1 +d38010f0| FLIS $(1.1754943508222875e-38), F1 +d30011f0| FLIS $(1.52587890625e-05), F1 +d38011f0| FLIS $(3.0517578125e-05), F1 +d30012f0| FLIS $(0.00390625), F1 +d38012f0| FLIS $(0.0078125), F1 +d30013f0| FLIS $(0.0625), F1 +d38013f0| FLIS $(0.125), F1 +d30014f0| FLIS $(0.25), F1 +d38014f0| FLIS $(0.3125), F1 +d30015f0| FLIS $(0.375), F1 +d38015f0| FLIS $(0.4375), F1 +d30016f0| FLIS $(0.5), F1 +d38016f0| FLIS $(0.625), F1 +d30017f0| FLIS $(0.75), F1 +d38017f0| FLIS $(0.875), F1 +d30018f0| FLIS $(1.0), F1 +d38018f0| FLIS $(1.25), F1 +d30019f0| FLIS $(1.5), F1 +d38019f0| FLIS $(1.75), F1 +d3001af0| FLIS $(2.0), F1 +d3801af0| FLIS $(2.5), F1 +d3001bf0| FLIS $(3.0), F1 +d3801bf0| FLIS $(4.0), F1 +d3001cf0| FLIS $(8.0), F1 +d3801cf0| FLIS $(16.0), F1 +d3001df0| FLIS $(128.0), F1 +d3801df0| FLIS $(256.0), F1 +d3001ef0| FLIS $(32768.0), F1 +d3801ef0| FLIS $(65536.0), F1 +d3001ff0| FLIS $(+Inf), F1 +d3801ff0| FLIS $(NaN), F1 +d30010f2| FLID $(-1.0), F1 +d38010f2| FLID $(2.2250738585072014e-308), F1 +d30011f2| FLID $(1.52587890625e-05), F1 +d38011f2| FLID $(3.0517578125e-05), F1 +d30012f2| FLID $(0.00390625), F1 +d38012f2| FLID $(0.0078125), F1 +d30013f2| FLID $(0.0625), F1 +d38013f2| FLID $(0.125), F1 +d30018f2| FLID $(1.0), F1 +d3001af2| FLID $(2.0), F1 +53a5c528| FMINMS F12, F11, F10 +53a5c52a| FMINMD F12, F11, F10 +d3395a29| FMAXMS F21, F20, F19 +d3395a2b| FMAXMD F21, F20, F19 +d3044940| FROUNDS F18, F9 +d3044942| FROUNDD F18, F9 +d3045940| FROUNDNXS F18, F9 +d3045942| FROUNDNXD F18, F9 +d39580c2| FCVTMODWD F1, X11 +d3c520a0| FLEQS F2, F1, X11 +d3c520a2| FLEQD F2, F1, X11 +d3d524a1| FLTQS F18, F9, X11 +d3d524a3| FLTQD F18, F9, X11 +d3a3412c| FMINMH F4, F3, F7 +d3a3412e| FMINMQ F4, F3, F7 +d3b3412c| FMAXMH F4, F3, F7 +d3b3412e| FMAXMQ F4, F3, F7 +d38310f4| FLIH $(6.103515625e-05), F7 +d30318f4| FLIH $(1.0), F7 +d3831ff4| FLIH $(NaN), F7 +d38310f6| FLIQ $(3.3621031431120935062626778173217526e-4932), F7 +d30318f6| FLIQ $(1.0), F7 +d3831ff6| FLIQ $(NaN), F7 +d3834144| FROUNDH F3, F7 +d3834146| FROUNDQ F3, F7 +d3835144| FROUNDNXH F3, F7 +d3835146| FROUNDNXQ F3, F7 +d38311e6| FMVHXQ F3, X7 +d38341b6| FMVPQX X4, X3, F7 + # 28.4.3: Zbc: Carry-less multiplication b313530a| CLMUL X5, X6, X7 b333530a| CLMULH X5, X6, X7 diff --git a/riscv64/riscv64spec/spec.go b/riscv64/riscv64spec/spec.go index 7c01a444..e464382d 100644 --- a/riscv64/riscv64spec/spec.go +++ b/riscv64/riscv64spec/spec.go @@ -27,10 +27,13 @@ var extensions = []string{ "rv_c", "rv_c_d", "rv_d", + "rv_d_zfa", "rv_f", + "rv_f_zfa", "rv_i", "rv_m", "rv_q", + "rv_q_zfa", "rv_v", "rv_zba", "rv_zbb", @@ -38,6 +41,7 @@ var extensions = []string{ "rv_zbs", "rv_zicbo", "rv_zfh", + "rv_zfh_zfa", "rv_zfhmin", "rv_zicond", "rv_zicsr", @@ -54,6 +58,7 @@ var extensions = []string{ "rv64_i", "rv64_m", "rv64_q", + "rv64_q_zfa", "rv64_zba", "rv64_zbb", "rv64_zbs", @@ -356,6 +361,11 @@ func decodeArgs(arg string, op string) string { return "arg_rd" case strings.Contains("arg_rs1", arg): + if strings.Contains(op, "FLI") { + // FLI instructions use the rs1 field to encode a 5-bit + // unsigned immediate selecting a floating-point constant. + return "arg_zimm" + } if isFloatReg(op, "rs") { return "arg_fs1" } @@ -566,20 +576,24 @@ func isFloatReg(op string, reg string) bool { strings.Contains(op, "VMFNE") || strings.Contains(op, "VMFGT") || strings.Contains(op, "VMFGE") || strings.Contains(op, "VFMERGE") || strings.Contains(op, "VFMV") || strings.Contains(op, "VFSLIDE1UP") || - strings.Contains(op, "VFSLIDE1DOWN"): + strings.Contains(op, "VFSLIDE1DOWN") || + strings.Contains(op, "FROUND") || strings.Contains(op, "FROUNDNX"): return true case strings.Contains(op, "FCLASS") || strings.Contains(op, "FCVT_L") || strings.Contains(op, "FCVT_W") || strings.Contains(op, "FEQ") || strings.Contains(op, "FLE") || strings.Contains(op, "FLT") || strings.Contains(op, "FMV_X_H") || strings.Contains(op, "FMV_X_D") || - strings.Contains(op, "FMV_X_W"): + strings.Contains(op, "FMV_X_W") || + strings.Contains(op, "FCVTMOD") || strings.Contains(op, "FLTQ") || + strings.Contains(op, "FLEQ") || strings.Contains(op, "FMVH"): return reg != "rd" case strings.Contains(op, "FCVT_D") || strings.Contains(op, "FCVT_S") || strings.Contains(op, "FCVT_H") || strings.Contains(op, "FCVT_Q") || strings.Contains(op, "FMV_H_X") || strings.Contains(op, "FMV_D_X") || - strings.Contains(op, "FMV_W_X"): + strings.Contains(op, "FMV_W_X") || + strings.Contains(op, "FLI") || strings.Contains(op, "FMVP"): return reg != "rs" default: