hello

[Sirius4105]

hello yuehniu
i have a question
i download your code,and build a project in SDx 2017.4
but i dont know which function should add in "Hardware Function"
if i put all functions which in ../src/fpga ,i will get lots of errors such as"SYNCHK 200-61: unsupported memory access on variable 'Out' which is (or contains) an array with unknown size at compile time."
which function should add in "Hardware Function",and how to use your code?
looking forward to your reply,Thx~!^_^

[SpinClown]

hello yuehniu
i have a question
i download your code,and build a project in SDx 2017.4
but i dont know which function should add in "Hardware Function"
if i put all functions which in ../src/fpga ,i will get lots of errors such as"SYNCHK 200-61: unsupported memory access on variable 'Out' which is (or contains) an array with unknown size at compile time."
which function should add in "Hardware Function",and how to use your code?
looking forward to your reply,Thx~!^_^

I have encountered the same problem with you. Have you solved it?

[yuehniu]

Only fc_fpga() and conv_fpga() are needed to be added into "Hardware Function". Sorry for reply so late.

[SpinClown]

And what are the meanings of these variables in fc_fpga.cpp/function fc_fpga? The variables are itils, otils, i_num, o_num and wtils.
Looking forward to your reply!

[yuehniu]

i_num is the number of inputs in fc layers; o_num is the number of outputs in fc_layers.

For itiles, otiles, and wtils, due to limited resources, the computing unit cannot do all the multiplication in one shot, meanwhile, the on-chip memory cannot hold all the input data (for example, there are 25088 inputs in the first fc layer in VGG16). Hence I divide input, output, and weight into small tiles, and compute tiles iteratively. If you go to "common.h", you can see there are two buffers in fc layer, one is for input, the other one is for output, they can reverse their role when computing next layer. The buffer depth is set to be 4096 and 1024, therefore, for 1st layer with 25088 inputs, I have to divide input into 25088/4096 ~= 7 itiles, for some layer with 4096 outputs, I have to divide output into 4096/1024 otiles. For "wtils", the computing units consist 64 parallel units calculating 64 multiplications with input. For a input tile with 4096 inputs, wtils = 4096 / 64 = 64.

Hope I've cleared my explanation. Do tell me if u still have confusions.

[SpinClown]

What does these word mean in conv_fpga.cpp, void conv_ochnl?
The word is (Ni - ((Ni >> WISec) << WISec)) * OSec + m, which is a parameter of the function conv_weight_read.

[yuehniu]

(Ni - ((Ni >> WISec) << WISec)) is used to get the remainder of Ni divided by WISec. Since directly using remainder op(like %) will cost a lot of LUT resources.

[Wanghaoshu]

hello,I have a question.I would like to know if all the weights are on the buffer for a layer. I think the weight buffer cannot contain all the weights for the latter layers.
Looking forward to your reply!